[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/acpi: Factor out common pcie_rp_xx_xx.asl

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46004 )

Change subject: soc/intel/common/block/acpi: Factor out common pcie_rp_xx_xx.asl
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Patch Set 1:
> Patch Set 1: Code-Review+1
>
> IMHO, this would be best done using a SSDT generator for the enabled PCIe ports only.

Yes, totally agree, i will raise a task for internal team to pick and do that going forward. bt i believe for now, this is what look best in terms of reuse of code :) but would be great to generate code based on existing Kconfig option from C code in future.