Lee Leahy (leroy.p.leahy@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16808
-gerrit
commit 690322729dc3589e430ad0ebee0513133312ebc6 Author: Lee Leahy leroy.p.leahy@intel.com Date: Wed Sep 28 17:16:44 2016 -0700
soc/intel/quark: Fix FSP 2.0 build
Fix the build issues with FSP 2.0: * Remove struct from the various data structures. * Properly display the serial port UPDs. * Change chipset_handle_reset parameter type
BRANCH=none BUG=None TEST=Build FSP 2.0 (SEC/PEI core with all FSP debug off) and run on Galileo Gen2
Change-Id: Icae578855006f18e7e5aa18d2fd196d300d0c658 Signed-off-by: Lee Leahy Leroy.P.Leahy@intel.com --- src/soc/intel/quark/fsp2_0.c | 2 +- src/soc/intel/quark/reset.c | 2 +- src/soc/intel/quark/romstage/debug.c | 20 +++++++++++++------- src/soc/intel/quark/romstage/fsp2_0.c | 6 +++--- 4 files changed, 18 insertions(+), 12 deletions(-)
diff --git a/src/soc/intel/quark/fsp2_0.c b/src/soc/intel/quark/fsp2_0.c index deb9334..2487cde 100644 --- a/src/soc/intel/quark/fsp2_0.c +++ b/src/soc/intel/quark/fsp2_0.c @@ -16,7 +16,7 @@ #include <fsp/util.h> #include <soc/ramstage.h>
-void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *silupd) +void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd) { }
diff --git a/src/soc/intel/quark/reset.c b/src/soc/intel/quark/reset.c index e3d3fac..b5b86f3 100644 --- a/src/soc/intel/quark/reset.c +++ b/src/soc/intel/quark/reset.c @@ -17,7 +17,7 @@ #include <fsp/util.h> #include <reset.h>
-void chipset_handle_reset(enum fsp_status status) +void chipset_handle_reset(uint32_t status) { /* Do a hard reset if Quark FSP ever requests a reset */ printk(BIOS_ERR, "Unknown reset type %x\n", status); diff --git a/src/soc/intel/quark/romstage/debug.c b/src/soc/intel/quark/romstage/debug.c index c08150e..1029ead 100644 --- a/src/soc/intel/quark/romstage/debug.c +++ b/src/soc/intel/quark/romstage/debug.c @@ -16,11 +16,11 @@ #include <console/console.h> #include <fsp/util.h>
-void soc_display_fspm_upd_params(const struct FSPM_UPD *fspm_old_upd, - const struct FSPM_UPD *fspm_new_upd) +void soc_display_fspm_upd_params(const FSPM_UPD *fspm_old_upd, + const FSPM_UPD *fspm_new_upd) { - const struct FSP_M_CONFIG *new; - const struct FSP_M_CONFIG *old; + const FSP_M_CONFIG *new; + const FSP_M_CONFIG *old;
old = &fspm_old_upd->FspmConfig; new = &fspm_new_upd->FspmConfig; @@ -62,9 +62,15 @@ void soc_display_fspm_upd_params(const struct FSPM_UPD *fspm_old_upd, old->RmuBaseAddress, new->RmuBaseAddress); fsp_display_upd_value("RmuLength", sizeof(old->RmuLength), old->RmuLength, new->RmuLength); - fsp_display_upd_value("SerialPortBaseAddress", - sizeof(old->SerialPortBaseAddress), - old->SerialPortBaseAddress, new->SerialPortBaseAddress); + fsp_display_upd_value("SerialPortPollForChar", + sizeof(old->SerialPortPollForChar), + old->SerialPortPollForChar, new->SerialPortPollForChar); + fsp_display_upd_value("SerialPortReadChar", + sizeof(old->SerialPortReadChar), + old->SerialPortReadChar, new->SerialPortReadChar); + fsp_display_upd_value("SerialPortWriteChar", + sizeof(old->SerialPortWriteChar), + old->SerialPortWriteChar, new->SerialPortWriteChar); fsp_display_upd_value("SmmTsegSize", sizeof(old->SmmTsegSize), old->SmmTsegSize, new->SmmTsegSize); fsp_display_upd_value("SocRdOdtVal", sizeof(old->SocRdOdtVal), diff --git a/src/soc/intel/quark/romstage/fsp2_0.c b/src/soc/intel/quark/romstage/fsp2_0.c index 51fcde7..d90bd38 100644 --- a/src/soc/intel/quark/romstage/fsp2_0.c +++ b/src/soc/intel/quark/romstage/fsp2_0.c @@ -87,14 +87,14 @@ int fill_power_state(void) return ps->prev_sleep_state; }
-void platform_fsp_memory_init_params_cb(struct FSPM_UPD *fspm_upd) +void platform_fsp_memory_init_params_cb(FSPM_UPD *fspm_upd) { - struct FSPM_ARCH_UPD *aupd; + FSPM_ARCH_UPD *aupd; const struct device *dev; const struct soc_intel_quark_config *config; char *rmu_file; size_t rmu_file_len; - struct FSP_M_CONFIG *upd; + FSP_M_CONFIG *upd;
/* Clear SMI and wake events */ clear_smi_and_wake_events();