[coreboot-gerrit] Change in coreboot[master]: cpu/x86: Add a prog_run hook to set up caching of XIP stages

[Arthur Heymans (Code Review)]

Hello Kyösti Mälkki, Aaron Durbin, build bot (Jenkins), Patrick Georgi, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/35993

to look at the new patch set (#10).

Change subject: cpu/x86: Add a prog_run hook to set up caching of XIP stages
......................................................................

cpu/x86: Add a prog_run hook to set up caching of XIP stages

Some platforms lack a non-eviction mode and therefore caching the
whole ROM to speed up XIP stages can be dangerous as it could result
in eviction if too much of the ROM is being accessed. The solution is
to only cache a region, about the size of the stage that the bootblock
is about to load: verstage and/or romstage.

CR0.CD bits are not touched to do this, but this seems to work just
fine on at least model_1067x and model_6ex.

Change-Id: I94d5771a57ffd74d53db3e35fe169d77d7fbb8cd
Signed-off-by: Arthur Heymans 
---
M src/cpu/x86/Kconfig
M src/cpu/x86/mtrr/Makefile.inc
A src/cpu/x86/mtrr/xip_cache.c
3 files changed, 133 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/35993/10