Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33767 )
Change subject: soc/amd/picasso: Update UARTs ......................................................................
Patch Set 13:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33767/13/src/soc/amd/picasso/includ... File src/soc/amd/picasso/include/soc/iomap.h:
https://review.coreboot.org/c/coreboot/+/33767/13/src/soc/amd/picasso/includ... PS13, Line 31: 0xfed80000
For stoney it was 0xfed80a00. […]
55072 Rev 3.06 Apr 05, 2018 BKDG for AMD Family 15h Models 70h-7Fh Processors pg 838 3.26.4.3 USB Legacy Registers This register space is used to provide USB legacy support. Each of the registers is located on a 32-bit boundary. The offsets of the registers are relative to the AcpiMMio base (FED8_0000h). Three of the operational regis- ters (HCEx4C, HCEx44 and HCEx48) are accessible at IO060 and IO064 when emulation is enabled. Reads and writes to the registers using IO addresses have side effects as outlined in the table below.