[coreboot-gerrit] [XS] Change in coreboot[main]: soc/amd/noncar/memlayout.ld: Warn about incorrect reset vector

[Arthur Heymans (Code Review)]

Arthur Heymans has submitted this change. ( https://review.coreboot.org/c/coreboot/+/64951?usp=email )

(

23 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: soc/amd/noncar/memlayout.ld: Warn about incorrect reset vector
......................................................................

soc/amd/noncar/memlayout.ld: Warn about incorrect reset vector

The x86 core always starts with an IP at 0xfff0. This needs to match in
the code.

Change-Id: Ibced50e4348a2b46511328f9b3f3afa836feb9a5
Signed-off-by: Arthur Heymans 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64951
Tested-by: build bot (Jenkins) 
Reviewed-by: Felix Held 
---
M src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld
1 file changed, 1 insertion(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Felix Held: Looks good to me, approved

diff --git a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld
index 090d8b7..9eb9d21 100644
--- a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld
+++ b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld
@@ -147,6 +147,7 @@

. = BOOTBLOCK_END - 0x10;
    _X86_RESET_VECTOR = .;
+	_bogus = ASSERT((_X86_RESET_VECTOR & 0xffff) == 0xfff0, "IP needs to be 0xfff0");
    .reset . : {
    	*(.reset);
    	. = 15;