Vladimir Serbinenko (phcoder@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6808
-gerrit
commit 939ff5ff718d2d766e52a799a30279695155f433 Author: Vladimir Serbinenko phcoder@gmail.com Date: Sun Aug 31 01:09:12 2014 +0200
i82801gx: Kill unused TCG and SMI1
SMI1 is being written to but never read from.
Change-Id: I82c0800713e3093eb1317b5e1f6f228771134857 Signed-off-by: Vladimir Serbinenko phcoder@gmail.com --- src/mainboard/getac/p470/acpi/platform.asl | 15 --------------- src/mainboard/getac/p470/acpi_tables.c | 18 ++---------------- src/southbridge/intel/i82801gx/smi.c | 2 -- src/southbridge/intel/i82801gx/smihandler.c | 19 ++----------------- 4 files changed, 4 insertions(+), 50 deletions(-)
diff --git a/src/mainboard/getac/p470/acpi/platform.asl b/src/mainboard/getac/p470/acpi/platform.asl index e0526a9..df9adc7 100644 --- a/src/mainboard/getac/p470/acpi/platform.asl +++ b/src/mainboard/getac/p470/acpi/platform.asl @@ -44,15 +44,6 @@ Method(TRAP, 1, Serialized) Return (SMIF) // Return value of SMI handler }
-/* SMI Function Trap */ -OperationRegion(SMI1, SystemMemory, 0xC0DEDEAD, 0x100) -Field(SMI1, AnyAcc, NoLock, Preserve) -{ - BCMD, 8, - DID, 32, - INFO, 1024 -} - /* The _PIC method is called by the OS to choose between interrupt * routing via the i8259 interrupt controller or the APIC. * @@ -77,11 +68,6 @@ Method(_PTS,1)
Store(0, _SB.ACFG)
- // Are we going to S3? - If (LEqual(Arg0, 3)) { - Store (0x4c, BCMD) - } - // Are we going to S4? If (Lequal(Arg0, 4)) { TRAP(0xe7) @@ -90,7 +76,6 @@ Method(_PTS,1)
// Are we going to S5? If (Lequal(Arg0, 5)) { - Store (0x4b, BCMD) TRAP(0xde) }
diff --git a/src/mainboard/getac/p470/acpi_tables.c b/src/mainboard/getac/p470/acpi_tables.c index 9a10087..9cd55f4 100644 --- a/src/mainboard/getac/p470/acpi_tables.c +++ b/src/mainboard/getac/p470/acpi_tables.c @@ -163,7 +163,7 @@ unsigned long write_acpi_tables(unsigned long start) acpi_header_t *dsdt; acpi_header_t *ecdt;
- void *gnvs, *smi1; + void *gnvs;
current = start;
@@ -268,22 +268,8 @@ unsigned long write_acpi_tables(unsigned long start) current += 0x100; ALIGN_CURRENT;
- for (i=0; i < dsdt->length; i++) { - if (*(u32*)(((u32)dsdt) + i) == 0xC0DEDEAD) { - printk(BIOS_DEBUG, "ACPI: Patching up SMI1 area in DSDT at offset 0x%04x -> 0x%08x\n", i, (u32)current); - *(u32*)(((u32)dsdt) + i) = current; // 0x100 bytes - break; - } - } - - /* Keep pointer around */ - smi1 = (void *)current; - - current += 0x100; - ALIGN_CURRENT; - /* And tell SMI about it */ - smm_setup_structures(gnvs, NULL, smi1); + smm_setup_structures(gnvs, NULL, NULL);
/* We patched up the DSDT, so we need to recalculate the checksum */ dsdt->checksum = 0; diff --git a/src/southbridge/intel/i82801gx/smi.c b/src/southbridge/intel/i82801gx/smi.c index 8cb11b2..134c232 100644 --- a/src/southbridge/intel/i82801gx/smi.c +++ b/src/southbridge/intel/i82801gx/smi.c @@ -387,7 +387,5 @@ void smm_setup_structures(void *gnvs, void *tcg, void *smi1) * after we relocated the GNVS, so this is not troublesome. */ *(u32 *)0x500 = (u32)gnvs; - *(u32 *)0x504 = (u32)tcg; - *(u32 *)0x508 = (u32)smi1; outb(0xea, 0xb2); } diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c index ba4d014..cccfe15 100644 --- a/src/southbridge/intel/i82801gx/smihandler.c +++ b/src/southbridge/intel/i82801gx/smihandler.c @@ -49,8 +49,6 @@ u8 smm_initialized = 0; * by coreboot. */ global_nvs_t *gnvs = (global_nvs_t *)0x0; -void *tcg = (void *)0x0; -void *smi1 = (void *)0x0;
/** * @brief read and clear PM1_STS @@ -407,10 +405,8 @@ static void southbridge_smi_apmc(unsigned int node, smm_state_save_area_t *state return; } gnvs = *(global_nvs_t **)0x500; - tcg = *(void **)0x504; - smi1 = *(void **)0x508; smm_initialized = 1; - printk(BIOS_DEBUG, "SMI#: Setting up structures to %p, %p, %p\n", gnvs, tcg, smi1); + printk(BIOS_DEBUG, "SMI#: Setting up structures to %p\n", gnvs); break; default: printk(BIOS_DEBUG, "SMI#: Unknown function APM_CNT=%02x\n", reg8); @@ -558,18 +554,7 @@ static void southbridge_smi_monitor(unsigned int node, smm_state_save_area_t *st /* IOTRAP(2) currently unused * IOTRAP(1) currently unused */
- /* IOTRAP(0) SMIC */ - if (IOTRAP(0)) { - if (!(trap_cycle & (1 << 24))) { // It's a write - printk(BIOS_DEBUG, "SMI1 command\n"); - data = RCBA32(0x1e18); - data &= mask; - // if (smi1) - // southbridge_smi_command(data); - // return; - } - // Fall through to debug - } + /* IOTRAP(0) SMIC: currently unused */
printk(BIOS_DEBUG, " trapped io address = 0x%x\n", trap_cycle & 0xfffc); for (i=0; i < 4; i++) if(IOTRAP(i)) printk(BIOS_DEBUG, " TRAP = %d\n", i);