Attention is currently required from: Mario Scheithauer, Werner Zeh.
Hello Werner Zeh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69966
to look at the new patch set (#3).
Change subject: mb/siemens/mc_ehl2: Disable L1 prefetcher ......................................................................
mb/siemens/mc_ehl2: Disable L1 prefetcher
As for mainboard mc_ehl1, a hard real-time dependency is also required for this mainboard. The L1 prefetcher on Elkhart Lake is too aggressive which in the end leads to an increased number of cache misses. Disabling the L1 prefetcher boosts up the performance (in some cases by more than 10 %) in this specific use case.
Change-Id: I07b27dd672533e693a6c2987d16f54333850760e Signed-off-by: Mario Scheithauer mario.scheithauer@siemens.com --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb 1 file changed, 19 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/69966/3