Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40722 )
Change subject: [WIP] Add Multiple Segment support ......................................................................
Patch Set 3:
Patch Set 3:
(3 comments)
Sorry for the delay, it was a busy week.
Looks good overall. I'm not 100% sure about the resources reported in _CRS. The spec says PCI segment groups are a mere software features that shouldn't affect the hardware. And in hardware there can't be a second device that would positively decode the same resources anyway. I'm not sure if we have to report these resource again. Maybe we don't need the `extrahostbridge.asl`?
I think we can do the Kconfig and what it entails first, and the ACPI changes in a separate commit.
@Nico, Thanks for your review time
As suggested split this CL into below, please help to review
Device: https://review.coreboot.org/c/coreboot/+/40335/6 Common TCSS: https://review.coreboot.org/c/coreboot/+/41010/1 Common SA https://review.coreboot.org/c/coreboot/+/40379/3 New SOC capabilities https://review.coreboot.org/c/coreboot/+/40363/5 Fixing compilation error with higher PCI segment group https://review.coreboot.org/c/coreboot/+/40336/6 ASL for Additional segment https://review.coreboot.org/c/coreboot/+/41011/1 Support for TGL board https://review.coreboot.org/c/coreboot/+/41012/1 Select from TGL SoC https://review.coreboot.org/c/coreboot/+/41013/1