Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45776 )
Change subject: mb/clevo/cml-u: drop PcieRpSlotImplemented for card reader ......................................................................
mb/clevo/cml-u: drop PcieRpSlotImplemented for card reader
PcieRpSlotImplemented should only be set to 1 for PCIe ports implementing a PCIe slot. Drop it for the on-board card reader.
Change-Id: I22628b4d4a7e317a01e46a61b5cd7bb9ebf548a0 Signed-off-by: Michael Niewöhner foss@mniewoehner.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/45776 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Felix Singer felixsinger@posteo.net Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb 1 file changed, 0 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb index 55c5c6e..e079dff 100644 --- a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb +++ b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb @@ -138,7 +138,6 @@ register "PcieRpLtrEnable[5]" = "1" register "PcieClkSrcUsage[3]" = "5" register "PcieClkSrcClkReq[3]" = "3" - register "PcieRpSlotImplemented[5]" = "1" end device pci 1c.6 off end # PCI Express Port 7 device pci 1c.7 on # PCI Express Port 8