Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30886
Change subject: soc/intel: Enable console in bootblock ......................................................................
soc/intel: Enable console in bootblock
In debug build, the serial printing in bootblock stage is critical, so enable that by default.
BUG=N/A TEST=Check generated .config file to see CONFIG_BOOTBLOCK_CONSOLE get set.
Signed-off-by: Lijian Zhao lijian.zhao@intel.com Change-Id: I0aa98575eeb14d4c5387415d3fde4677a6b7ffe6 --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/icelake/Kconfig 2 files changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/30886/1
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index a3390d8..6347f03 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -26,6 +26,7 @@ select ARCH_RAMSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_VERSTAGE_X86_32 + select BOOTBLOCK_CONSOLE select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES select C_ENVIRONMENT_BOOTBLOCK diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 34af339..ff284cd 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -12,6 +12,7 @@ select ARCH_RAMSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_VERSTAGE_X86_32 + select BOOTBLOCK_CONSOLE select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES select C_ENVIRONMENT_BOOTBLOCK