Werner Zeh (werner.zeh@siemens.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17671
-gerrit
commit 266d6ee65e2a67b8692a81b1d3cafdaaeeb17147 Author: Werner Zeh werner.zeh@siemens.com Date: Thu Dec 1 10:57:34 2016 +0100
mc_tcu3: Do not abort initialization of PTN3460 when HW-ID is missing
Do not abort the initialization of PTN3460 if HW-ID could not be retrieved and just assume that the HW-ID does not match 7.9.2.0. In this case PTN3460 will be setup to a working condition even if this field is missing. This makes this driver more robust with faulty blocks.
Change-Id: I301fb165a7924768e44182d92be820294beb0280 Signed-off-by: Werner Zeh werner.zeh@siemens.com --- src/mainboard/siemens/mc_tcu3/ptn3460.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/src/mainboard/siemens/mc_tcu3/ptn3460.c b/src/mainboard/siemens/mc_tcu3/ptn3460.c index cd59492..347bc9c 100644 --- a/src/mainboard/siemens/mc_tcu3/ptn3460.c +++ b/src/mainboard/siemens/mc_tcu3/ptn3460.c @@ -58,11 +58,6 @@ int ptn3460_init(char *hwi_block) hwi_block); return 1; } - if (hwilib_get_field(HWID, hwid, sizeof(hwid)) != sizeof(hwid)) { - printk(BIOS_ERR, "LCD: Missing HW-ID from %s\n", - hwi_block); - return 1; - } /* Here, all the desired information for setting up DP2LVDS converter*/ /* are present. Inside the converter, table 6 will be used for */ /* the timings. */ @@ -85,10 +80,12 @@ int ptn3460_init(char *hwi_block) cfg.lvds_interface_ctrl1 |= 0x20; /* Use 18 bits per pixel */
cfg.lvds_interface_ctrl2 = 0x03; /* no clock spreading, 300 mV LVDS swing */ - if (memcmp(hwid, tcu31_hwid, sizeof(hwid))) - cfg.lvds_interface_ctrl3 = 0x00; /* no LVDS signal swap */ - else + /* Swap LVDS even and odd lanes for HW-ID 7.9.2.0 only. */ + if (hwilib_get_field(HWID, hwid, sizeof(hwid)) == sizeof(hwid) && + !(memcmp(hwid, tcu31_hwid, sizeof(hwid)))) { cfg.lvds_interface_ctrl3 = 0x01; /* swap LVDS even and odd */ + } else + cfg.lvds_interface_ctrl3 = 0x00; /* no LVDS signal swap */ cfg.t2_delay = 1; /* Delay T2 (VDD to LVDS active) by 16 ms */ cfg.t3_timing = 10; /* 500 ms from LVDS to backlight active */ cfg.t12_timing = 20; /* 1 second re-power delay */