[coreboot-gerrit] Change in coreboot[master]: arch/x86: Cache the TSEG region at the top of ram

[Aaron Durbin (Code Review)]

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34995 )

Change subject: arch/x86: Cache the TSEG region at the top of ram
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Patch Set 7:

(1 comment)

https://review.coreboot.org/c/coreboot/+/34995/7/src/arch/x86/postcar_loader... 
File src/arch/x86/postcar_loader.c:

https://review.coreboot.org/c/coreboot/+/34995/7/src/arch/x86/postcar_loader... 
PS7, Line 205: 	if (!CONFIG(TSEG_STAGE_CACHE))
If this is controlled by a Kconfig why not just make this static to the compilation unit and call it from run_postcar_phase()?