Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/22955
Change subject: mainboard/google/fizz: Enable S0ix ......................................................................
mainboard/google/fizz: Enable S0ix
Enable S0ix for fizz.
BUG=b:67598361 BRANCH=None TEST=None. Need to be tested with EC and kernel as well.
Change-Id: I981d2cc7e969a44567b0f21f63f68c78e73f5cb5 Signed-off-by: Shelley Chen shchen@chromium.org --- M src/mainboard/google/fizz/devicetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/22955/1
diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb index 25eda89..6873d44 100644 --- a/src/mainboard/google/fizz/devicetree.cb +++ b/src/mainboard/google/fizz/devicetree.cb @@ -50,6 +50,9 @@ # Enable DPTF register "dptf_enable" = "1"
+ # Enable S0ix + register "s0ix_enable" = "1" + # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "1"