[coreboot-gerrit] [S] Change in coreboot[main]: sb/intel/bd82x6x: Use helper for PCIe hotplug

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78227?usp=email )

Change subject: sb/intel/bd82x6x: Use helper for PCIe hotplug
......................................................................

sb/intel/bd82x6x: Use helper for PCIe hotplug

Introduce pci_is_hotplugable is helper to find hotpluggable
PCIe devices.

Test: PCI express slot is still marked as the only hotpluggable
      PCIe root port.

Change-Id: I25aae540ff2ffa3ec5b93ed9caa838b4e50048d2
Signed-off-by: Patrick Rudolph 
---
M src/southbridge/intel/bd82x6x/pcie.c
1 file changed, 9 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/78227/1

diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c
index 6f082e8..206894d 100644
--- a/src/southbridge/intel/bd82x6x/pcie.c
+++ b/src/southbridge/intel/bd82x6x/pcie.c
@@ -32,6 +32,13 @@
    return NULL;
 }

+static bool pci_is_hotplugable(struct device *dev)
+{
+	struct southbridge_intel_bd82x6x_config *config = dev->chip_info;
+
+	return config && config->pcie_hotplug_map[PCI_FUNC(dev->path.pci.devfn)];
+}
+
 static void pch_pcie_pm_early(struct device *dev)
 {
    u16 link_width_p0, link_width_p4;
@@ -179,7 +186,6 @@
 static void pci_init(struct device *dev)
 {
    u16 reg16;
-	struct southbridge_intel_bd82x6x_config *config = dev->chip_info;

printk(BIOS_DEBUG, "Initializing PCH PCIe bridge.\n");

@@ -202,7 +208,7 @@
    pci_write_config16(dev, 0x1e, reg16);

/* Enable expresscard hotplug events.  */
-	if (config->pcie_hotplug_map[PCI_FUNC(dev->path.pci.devfn)]) {
+	if (pci_is_hotplugable(dev)) {
    	pci_or_config32(dev, 0xd8, 1 << 30);
    	pci_write_config16(dev, 0x42, 0x142);
    }
@@ -216,9 +222,7 @@

static void pch_pciexp_scan_bridge(struct device *dev)
 {
-	struct southbridge_intel_bd82x6x_config *config = dev->chip_info;
-
-	if (CONFIG(PCIEXP_HOTPLUG) && config->pcie_hotplug_map[PCI_FUNC(dev->path.pci.devfn)]) {
+	if (CONFIG(PCIEXP_HOTPLUG) && pci_is_hotplugable(dev)) {
    	pciexp_hotplug_scan_bridge(dev);
    } else {
    	/* Normal PCIe Scan */