Jérémy Compostella has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85199?usp=email )
(
35 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/intel/pantherlake: Add Touch Controller UPD and SoC config ......................................................................
soc/intel/pantherlake: Add Touch Controller UPD and SoC config
This commit introduces the necessary changes to configure the Touch Host Controller User Platform Data (UPD) fields such as ThcAssignment, ThcMode, and ThcWakeOnTouch according to the specific SoC chip configuration derived from the devicetree.
Key changes include: - Creation of override functions to supply SoC-specific configurations for the Touch Host Controller (THC). - Addition of a new SoC-specific THC header file. - Inclusion of a motherboard (MB)-specific THC header file. - Establishment of a build path to allow devicetree to leverage variant-specific defines.
BUG=none TEST=Add CONFIG_DRIVERS_INTEL_TOUCH to fatcat board with the devicetree changes for touchscreen and/or touchpad, as well as proper CBI settings. Boot the board to OS and check that the THC SoC-specific info is generated in the SSDT.
Signed-off-by: Cliff Huang cliff.huang@intel.com Change-Id: I15fb62eaadc03b9a17e94609b97c686518150e2e Reviewed-on: https://review.coreboot.org/c/coreboot/+/85199 Reviewed-by: Jérémy Compostella jeremy.compostella@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/pantherlake/Makefile.mk M src/soc/intel/pantherlake/chip.h M src/soc/intel/pantherlake/fsp_params.c A src/soc/intel/pantherlake/include/soc/touch.h A src/soc/intel/pantherlake/touch.c 5 files changed, 134 insertions(+), 2 deletions(-)
Approvals: Jérémy Compostella: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/soc/intel/pantherlake/Makefile.mk b/src/soc/intel/pantherlake/Makefile.mk index f3403b5..e2f8dd7 100644 --- a/src/soc/intel/pantherlake/Makefile.mk +++ b/src/soc/intel/pantherlake/Makefile.mk @@ -43,6 +43,7 @@ ramstage-y += systemagent.c ramstage-y += tcss.c ramstage-y += xhci.c +ramstage-$(CONFIG_DRIVERS_INTEL_TOUCH) += touch.c
smm-y += elog.c smm-y += gpio.c diff --git a/src/soc/intel/pantherlake/chip.h b/src/soc/intel/pantherlake/chip.h index cd91e31..eb702b7 100644 --- a/src/soc/intel/pantherlake/chip.h +++ b/src/soc/intel/pantherlake/chip.h @@ -26,6 +26,8 @@ #define MAX_SAGV_POINTS 4 #define MAX_HD_AUDIO_SDI_LINKS 2
+#define NUM_THC 2 + /* In-Band ECC Operation Mode */ enum ibecc_mode { IBECC_MODE_PER_REGION, @@ -539,6 +541,19 @@
uint16_t max_dram_speed_mts;
+ /* + * Touch Host Controller Mode + * Switch between Intel THC protocol and Industry standard HID protocols. + * 0x0:Thc, 0x1:HID over SPI, 0x2:HID over I2C + */ + uint8_t thc_mode[NUM_THC]; + + /* + * Touch Host Controller Wake On Touch + * Based on this setting vGPIO for given THC will be in native mode, and additional _CRS + * for wake will be exposed in ACPI + */ + bool thc_wake_on_touch[NUM_THC]; };
typedef struct soc_intel_pantherlake_config config_t; diff --git a/src/soc/intel/pantherlake/fsp_params.c b/src/soc/intel/pantherlake/fsp_params.c index 7544894..cac866f 100644 --- a/src/soc/intel/pantherlake/fsp_params.c +++ b/src/soc/intel/pantherlake/fsp_params.c @@ -576,8 +576,15 @@ static void fill_fsps_thc_params(FSP_S_CONFIG *s_cfg, const struct soc_intel_pantherlake_config *config) { - s_cfg->ThcAssignment[0] = is_devfn_enabled(PCI_DEVFN_THC0) ? THC_0 : THC_NONE; - s_cfg->ThcAssignment[1] = is_devfn_enabled(PCI_DEVFN_THC1) ? THC_1 : THC_NONE; + for (size_t i = 0; i < NUM_THC; i++) { + if (!is_devfn_enabled(_PCI_DEVFN(THC, i))) { + s_cfg->ThcAssignment[i] = THC_NONE; + continue; + } + s_cfg->ThcAssignment[i] = THC_0 + i; + s_cfg->ThcMode[i] = config->thc_mode[i]; + s_cfg->ThcWakeOnTouch[i] = config->thc_wake_on_touch[i]; + } }
static void fill_fsps_8254_params(FSP_S_CONFIG *s_cfg, diff --git a/src/soc/intel/pantherlake/include/soc/touch.h b/src/soc/intel/pantherlake/include/soc/touch.h new file mode 100644 index 0000000..33b3d1d --- /dev/null +++ b/src/soc/intel/pantherlake/include/soc/touch.h @@ -0,0 +1,64 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_PANTHERLAKE_TOUCH_H_ +#define _SOC_PANTHERLAKE_TOUCH_H_ + +/* For THC-I2C: */ + +/* + * I2C Standard Mode (100Kbps): + * Requested Connection Speed: 186A0 + * I2C Speed Mode: Standard (100Kbps) = 0x186A0 + * + * I2C Fast Mode (400Kbps): + * Requested Connection Speed: 61A80 + * I2C Speed Mode: Fast (400Kbps) = 0x612B0 + * + * I2C Fast-Plus Mode (1Mbps): + * Requested Connection Speed: F4240 + * I2C Speed Mode: Fast-Plus (1Mbps) = 0xF4240 + * FM SCL HIGH Period: 34 Fast Mode (FM) CLK Signal HIGH Period + * FM SCL LOW Period: 3E Fast Mode (FM) CLK Signal LOW Period + */ +#define SOC_PTL_THC_I2C_CONNECTION_SPEED_SM 0x186a0 +#define SOC_PTL_THC_I2C_CONNECTION_SPEED_FM 0x61a80 +#define SOC_PTL_THC_I2C_CONNECTION_SPEED_FMP 0xf4240 + +/* + * 0 = 7-bit Addressing Mode for HID-I2C (Default) + * 1 = 10-bit Addressing Mode for HID-I2C + */ +#define SOC_PTL_THC_I2C_ADDR_MODE 0 +#define SOC_PTL_THC_I2C_SM_SCL_HIGH_PERIOD 0x267 +#define SOC_PTL_THC_I2C_SM_SCL_LOW_PERIOD 0x271 +#define SOC_PTL_THC_I2C_SM_SDA_HOLD_TX_PERIOD 0 +#define SOC_PTL_THC_I2C_SM_SDA_HOLD_RX_PERIOD 0 +#define SOC_PTL_THC_I2C_FM_SCL_HIGH_PERIOD 0x92 +#define SOC_PTL_THC_I2C_FM_SCL_LOW_PERIOD 0x9c +#define SOC_PTL_THC_I2C_FM_SDA_HOLD_TX_PERIOD 0 +#define SOC_PTL_THC_I2C_FM_SDA_HOLD_RX_PERIOD 0 +#define SOC_PTL_THC_I2C_SUPPRESSED_SPIKES_S_F_FP 0 +#define SOC_PTL_THC_I2C_FMP_SCL_HIGH_PERIOD 0x34 +#define SOC_PTL_THC_I2C_FMP_SCL_LOW_PERIOD 0x3e +#define SOC_PTL_THC_I2C_FMP_SDA_HOLD_TX_PERIOD 0 +#define SOC_PTL_THC_I2C_FMP_SDA_HOLD_RX_PERIOD 0 +#define SOC_PTL_THC_I2C_HM_SCL_HIGH_PERIOD 0 +#define SOC_PTL_THC_I2C_HM_SCL_LOW_PERIOD 0 +#define SOC_PTL_THC_I2C_HM_SDA_HOLD_TX_PERIOD 0 +#define SOC_PTL_THC_I2C_HM_SDA_HOLD_RX_PERIOD 0 +#define SOC_PTL_THC_I2C_SUPPRESSED_SPIKES_H_FP 0 + + +/* For THC-SPI: */ + +/* unit: ms */ +#define SOC_PTL_THC_RST_SEQ_DLY 300 + +/* The initial default speed is 17000000 Hz. */ +#define SOC_PTL_THC_CONNECTION_SPEED 17000000 + +/* 0 = no limit */ +#define SOC_PTL_THC_HIDSPI_LIMIT_PKT_SZ 0 +#define SOC_PTL_THC_PERFORMANCE_LIMIT 0 + +#endif /* _SOC_PANTHERLAKE_TOUCH_H_ */ diff --git a/src/soc/intel/pantherlake/touch.c b/src/soc/intel/pantherlake/touch.c new file mode 100644 index 0000000..ed475fe --- /dev/null +++ b/src/soc/intel/pantherlake/touch.c @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <drivers/intel/touch/chip.h> +#include <soc/touch.h> + +/* SoC-specific THC-I2C config */ +const struct intel_thc_hidi2c_info *soc_get_thc_hidi2c_info(void) +{ + static const struct intel_thc_hidi2c_info soc_thc_hidi2c_info = { + .connection_speed = SOC_PTL_THC_I2C_CONNECTION_SPEED_FM, + .addr_mode = SOC_PTL_THC_I2C_ADDR_MODE, + .sm_scl_high_period = SOC_PTL_THC_I2C_SM_SCL_HIGH_PERIOD, + .sm_scl_low_period = SOC_PTL_THC_I2C_SM_SCL_LOW_PERIOD, + .sm_sda_hold_tx_period = SOC_PTL_THC_I2C_SM_SDA_HOLD_TX_PERIOD, + .sm_sda_hold_rx_period = SOC_PTL_THC_I2C_SM_SDA_HOLD_RX_PERIOD, + .fm_scl_high_period = SOC_PTL_THC_I2C_FM_SCL_HIGH_PERIOD, + .fm_scl_low_period = SOC_PTL_THC_I2C_FM_SCL_LOW_PERIOD, + .fm_sda_hold_tx_period = SOC_PTL_THC_I2C_FM_SDA_HOLD_TX_PERIOD, + .fm_sda_hold_rx_period = SOC_PTL_THC_I2C_FM_SDA_HOLD_RX_PERIOD, + .suppressed_spikes_s_f_fp = SOC_PTL_THC_I2C_SUPPRESSED_SPIKES_S_F_FP, + .fmp_scl_high_period = SOC_PTL_THC_I2C_FMP_SCL_HIGH_PERIOD, + .fmp_scl_low_period = SOC_PTL_THC_I2C_FMP_SCL_LOW_PERIOD, + .fmp_sda_hold_tx_period = SOC_PTL_THC_I2C_FMP_SDA_HOLD_TX_PERIOD, + .fmp_sda_hold_rx_period = SOC_PTL_THC_I2C_FMP_SDA_HOLD_RX_PERIOD, + .hm_scl_high_period = SOC_PTL_THC_I2C_HM_SCL_HIGH_PERIOD, + .hm_scl_low_period = SOC_PTL_THC_I2C_HM_SCL_LOW_PERIOD, + .hm_sda_hold_tx_period = SOC_PTL_THC_I2C_HM_SDA_HOLD_TX_PERIOD, + .hm_sda_hold_rx_period = SOC_PTL_THC_I2C_HM_SDA_HOLD_RX_PERIOD, + .suppressed_spikes_h_fp = SOC_PTL_THC_I2C_SUPPRESSED_SPIKES_H_FP, + }; + return &soc_thc_hidi2c_info; +} + +/* SoC-specific THC-SPI config */ +const struct intel_thc_hidspi_info *soc_get_thc_hidspi_info(void) +{ + static const struct intel_thc_hidspi_info soc_thc_hidspi_info = { + .connection_speed = SOC_PTL_THC_CONNECTION_SPEED, + .write_mode = HIDSPI_WRITE_MODE_MULTI_SINGLE_SPI, + .limit_packet_size = SOC_PTL_THC_HIDSPI_LIMIT_PKT_SZ, + .performance_limit = SOC_PTL_THC_PERFORMANCE_LIMIT, + .reset_sequencing_delay = SOC_PTL_THC_RST_SEQ_DLY, + }; + return &soc_thc_hidspi_info; +}