Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40291 )
Change subject: vendorcode/amd/agesa/.../Mem/Tech/DDR3: XMP memory profiles support ......................................................................
Patch Set 1:
Later I could try to take the not-used-yet XMP-only fields into account. Examples:
1) Add a check for XMP profiles presence, and fallback from XMP_2 --> XMP_1 --> JEDEC if XMP_2 or XMP_1 does not exist. This check is simple - see "XMP_PROFILES 178" at https://github.com/mikebdp2/ddr3spd/blob/master/ddr3spd.c - but inserting it to AGESA could be tricky.
2) There is "XMP_1_CMD_RATE 208"/"XMP_2_CMD_RATE 243". Many XMP profiles have 1T or 2T rate (mine are 2T), and - if I understood the AGESA noodles correctly - SlowMode aka SlowAccessMode (for 2T CMD mode instead of 1T) is already enabled via ./Include/PlatformMemoryConfiguration.h , so they should work; but some profiles could need a 3T.