David Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60388 )
Change subject: mb/google/brya/var/kano: disabled autonomous GPIO power management ......................................................................
mb/google/brya/var/kano: disabled autonomous GPIO power management
Used H1 firmware where the last version number is 0.0.22, 0.3.22 or less to production that will need to disable autonomous GPIO power management and then can get H1 version by gsctool -a -f -M
BUG=b:201266532 TEST=FW_NAME=kano emerge-brya coreboot and verify it builds without error.
Signed-off-by: David Wu david_wu@quanta.corp-partner.google.com Change-Id: I9607af42a00c1b5f38c6e4e0effdeeaba18af5ff --- M src/mainboard/google/brya/variants/kano/overridetree.cb 1 file changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/60388/1
diff --git a/src/mainboard/google/brya/variants/kano/overridetree.cb b/src/mainboard/google/brya/variants/kano/overridetree.cb index a7e4271..848100e 100644 --- a/src/mainboard/google/brya/variants/kano/overridetree.cb +++ b/src/mainboard/google/brya/variants/kano/overridetree.cb @@ -15,6 +15,17 @@ chip soc/intel/alderlake register "SaGv" = "SaGv_Enabled"
+ # This disabled autonomous GPIO power management, otherwise + # old cr50 FW only supports short pulses; need to clarify + # the minimum PCH IRQ pulse width with Intel, b/180111628 + register "gpio_override_pm" = "1" + register "gpio_pm[COMM_0]" = "0" + register "gpio_pm[COMM_1]" = "0" + register "gpio_pm[COMM_2]" = "0" + register "gpio_pm[COMM_3]" = "0" + register "gpio_pm[COMM_4]" = "0" + register "gpio_pm[COMM_5]" = "0" + # GPE configuration register "pmc_gpe0_dw1" = "GPP_D"