HAOUAS Elyes (ehaouas@noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18019
-gerrit
commit 261a5824753c9468825d40993e1ee3856ce2e149 Author: Elyes HAOUAS ehaouas@noos.fr Date: Mon Jan 2 21:00:59 2017 +0100
cpu/intel/speedstep/acpi.c: Add Netburst CPUs
MSR(0x2c) provides information abour FSB frequency
Change-Id: I42b0dcfdd62e07422acb77462aefc2d9b62fba19 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- src/cpu/intel/speedstep/acpi.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/src/cpu/intel/speedstep/acpi.c b/src/cpu/intel/speedstep/acpi.c index d85e487..1dca1ae 100644 --- a/src/cpu/intel/speedstep/acpi.c +++ b/src/cpu/intel/speedstep/acpi.c @@ -49,7 +49,17 @@ static int determine_total_number_of_cores(void) */ static int get_fsb(void) { - const u32 fsbcode = rdmsr(MSR_FSB_FREQ).lo & 7; + u32 fsbcode; + const u32 eax = cpuid_ext(0x01, 0).eax; + msr_t msr; + + if (((eax >> 8) & 0xf) == 0xf) { + msr = rdmsr(0x2c); + fsbcode = (msr.lo >> 16) & 7; + } else { + fsbcode = rdmsr(MSR_FSB_FREQ).lo & 7; + } + switch (fsbcode) { case 0: return 800; /* / 3 == 266 */ case 1: return 400; /* / 3 == 133 */