[coreboot-gerrit] [S] Change in coreboot[master]: soc/intel/cmn/cse: Send EOP cmd from .final aka `cse final()`

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69975 )

Change subject: soc/intel/cmn/cse: Send EOP cmd from .final aka `cse_final()`
......................................................................

soc/intel/cmn/cse: Send EOP cmd from .final aka `cse_final()`

This patch refactors common code to allow cse_final() function to send
EOP cmd if the SoC user selects `SOC_INTEL_CSE_SET_EOP` kconfig.

This patch helps cse_final_ready_to_boot() and
cse_final_end_of_firmware() function for being meaningful with its
operation and let cse_final() being that outer layer to perform three
operations based on the selected kconfig.

1. send cse eop command
2. perform cse_final_end_of_firmware() operations
3. perform cse_final_end_of_firmware() operations

BUG=none
TEST=Able to send EOP command successfully for Google/Taeko.

Signed-off-by: Subrata Banik 
Change-Id: I412291c9378011509d3825f9b01e81bfced53303
---
M src/soc/intel/common/block/cse/cse.c
1 file changed, 31 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/69975/1

diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c
index c2d4484..fdeb01e 100644
--- a/src/soc/intel/common/block/cse/cse.c
+++ b/src/soc/intel/common/block/cse/cse.c
@@ -1228,17 +1228,13 @@
  * performed by FSP NotifyPhase(Ready To Boot) API invocations.
  *
  * Operations are:
- * 1. Send EOP to CSE if not done.
- * 2. Perform global reset lock.
- * 3. Put HECI1 to D0i3 and disable the HECI1 if the user selects
+ * 1. Perform global reset lock.
+ * 2. Put HECI1 to D0i3 and disable the HECI1 if the user selects
  *      DISABLE_HECI1_AT_PRE_BOOT config or CSE HFSTS1 Operation Mode is
  *      `Software Temporary Disable`.
  */
 static void cse_final_ready_to_boot(void)
 {
-	if (CONFIG(SOC_INTEL_CSE_SET_EOP))
-		cse_send_end_of_post();
-
    cse_control_global_reset_lock();

if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT) || cse_is_hfs1_com_soft_temp_disable()) {
@@ -1265,6 +1261,10 @@
  */
 static void cse_final(struct device *dev)
 {
+	/* 1. Send EOP to CSE if not done.*/
+	if (CONFIG(SOC_INTEL_CSE_SET_EOP))
+		cse_send_end_of_post();
+
    if (!CONFIG(USE_FSP_NOTIFY_PHASE_READY_TO_BOOT))
    	cse_final_ready_to_boot();