Duan huayang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40525 )
Change subject: soc/mediatek/mt8183: Use term settings for high DRAM frequency ......................................................................
Patch Set 10:
(2 comments)
https://review.coreboot.org/c/coreboot/+/40525/8//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/40525/8//COMMIT_MSG@11 PS8, Line 11: .
Reference: JEDEC STANDARD <JESD209-4B> 4. […]
Done
https://review.coreboot.org/c/coreboot/+/40525/7/src/soc/mediatek/mt8183/dra... File src/soc/mediatek/mt8183/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/40525/7/src/soc/mediatek/mt8183/dra... PS7, Line 272: if (fsp == FSP_0) { : mr->MR13Value &= ~(1 << 6); : mr->MR13Value &= 0x7f; : } else { : mr->MR13Value |= (1 << 6); : mr->MR13Value |= 0x80; : }
Could we initialize the value in dramc_mode_reg_init()? And hence no need to remove the "const" modi […]
MR13Value is a global value need dynamic update between FSP0 and FSP1, can't pre-init at dramc_mode_reg_init();