Alec Ari (neotheuser@ymail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4589
-gerrit
commit e11a899f27b5c424d67020436e49c58948025719 Author: Alec Ari neotheuser@ymail.com Date: Sun Dec 29 23:48:38 2013 -0600
SuperIO: Add support for Nuvoton NCT6779D (Draft)
Adds support for the Nuvoton NCT6779D Super I/O (Not working) This is an entry draft and a lot of the datasheet I had difficulty understanding, therefor this commit should be thoroughly reviewed and verified by an experienced developer before pushing this into the official tree.
This commit will not work as-is and has not been tested. It currently does not compile (fixing)
Change-Id: I03b3c39e4409bd57e8c0759d9c3fdd160f0376d4 Signed-off-by: Alec Ari neotheuser@ymail.com --- src/superio/nuvoton/Kconfig | 2 + src/superio/nuvoton/Makefile.inc | 1 + src/superio/nuvoton/nct6779d/Makefile.inc | 23 ++++++++++ src/superio/nuvoton/nct6779d/early_init.c | 47 +++++++++++++++++++ src/superio/nuvoton/nct6779d/nct6779d.h | 76 +++++++++++++++++++++++++++++++ src/superio/nuvoton/nct6779d/superio.c | 68 +++++++++++++++++++++++++++ 6 files changed, 217 insertions(+)
diff --git a/src/superio/nuvoton/Kconfig b/src/superio/nuvoton/Kconfig index 142738d..8bbfdb0 100644 --- a/src/superio/nuvoton/Kconfig +++ b/src/superio/nuvoton/Kconfig @@ -21,3 +21,5 @@ config SUPERIO_NUVOTON_WPCM450 bool config SUPERIO_NUVOTON_NCT5104D bool +config SUPERIO_NUVOTON_NCT6779D + bool diff --git a/src/superio/nuvoton/Makefile.inc b/src/superio/nuvoton/Makefile.inc index 18025c9..d115bac 100644 --- a/src/superio/nuvoton/Makefile.inc +++ b/src/superio/nuvoton/Makefile.inc @@ -19,3 +19,4 @@
subdirs-$(CONFIG_SUPERIO_NUVOTON_WPCM450) += wpcm450 subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += nct5104d +subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT6779D) += nct6779d diff --git a/src/superio/nuvoton/nct6779d/Makefile.inc b/src/superio/nuvoton/nct6779d/Makefile.inc new file mode 100644 index 0000000..1900470 --- /dev/null +++ b/src/superio/nuvoton/nct6779d/Makefile.inc @@ -0,0 +1,23 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2013 Alec Ari (neotheuser@ymail.com) +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +romstage-$(CONFIG_SUPERIO_NUVOTON_NCT6779D) += early_init.c +ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT6779D) += superio.c + diff --git a/src/superio/nuvoton/nct6779d/early_init.c b/src/superio/nuvoton/nct6779d/early_init.c new file mode 100644 index 0000000..3e51724 --- /dev/null +++ b/src/superio/nuvoton/nct6779d/early_init.c @@ -0,0 +1,47 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Alec Ari neotheuser@ymail.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <arch/romcc_io.h> +#include <device/pnp_def.h> +#include "nct6779d.h" + +static void pnp_enter_extended_mode(device_t dev) +{ + u16 port = dev >> 8; + outb(0x87,port); + outb(0x87,port); +} + +static void pnp_exit_extended_mode(device_t dev) +{ + u16 port = dev >> 8; + outb(0xaa,port); +} + +static void nct6779d_enable_serial(device_t dev, u16 iobase) +{ + pnp_enter_extended_mode(dev); + pnp_set_logical_device(dev); + pnp_set_enable(dev,0); + pnp_set_iobase(dev,PNP_IDX_IO0, iobase); + pnp_set_enable(dev,1); + pnp_exit_extended_mode(dev); +} diff --git a/src/superio/nuvoton/nct6779d/nct6779d.h b/src/superio/nuvoton/nct6779d/nct6779d.h new file mode 100644 index 0000000..5019380 --- /dev/null +++ b/src/superio/nuvoton/nct6779d/nct6779d.h @@ -0,0 +1,76 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Alec Ari neotheuser@ymail.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef SUPERIO_NUVOTON_NCT6779D_NCT6779D_H +#define SUPERIO_NUVOTON_NCT6779D_NCT6779D_H + +/* Logical Device Numbers (LDN). */ +#define NCT6779D_ACPI 0x0a /* ACPI */ + +/* Should NCT6779D_HWMN be a virtual LDN since it is for Hardware Monitor and Front Panel LED? */ +#define NCT6779D_HWMN 0x0b /* Hw-mon / Front Pan LED */ + +#define NCT6779D_WDT1 0x0d /* WDT1 */ +#define NCT6779D_CIRW 0x0e /* CIR Wake-up */ +#define NCT6779D_PPOD 0x0f /* GPIO Push-Pull / Open drain select */ +#define NCT6779D_PAR 0x01 /* Parallel Port */ +#define NCT6779D_SP1 0x02 /* Com1 */ + +/* Should NCT6779D_SP2 be a virtual LDN since it is for UART B & IR? */ +#define NCT6779D_SP2 0x03 /* Com2 (UART B & IR) */ + +#define NCT6779D_KBD 0x05 /* Keyboard Controller */ +#define NCT6779D_CIR 0x06 /* CIR */ + +/* Should NCT6779D_GPIO_WDT be a virtual LDN since it is for WDT1, GPIO 0,1? */ +#define NCT6779D_GPIO_WDT 0x08 /* GPIO WDT Interface */ + +#define NCT6779D_UART 0x14 /* Port 80 UART */ +#define NCT6779D_DSLP 0x16 /* Deep Sleep */ + +/* Virtual Logical Device Numbers (LDN) */ +/* What is going on here? */ +#define NCT6779D_GPIO_ALL_V 0x09 /* GPIO - 1,2,3,4,5,6,7,8 */ + +/* Why does this LDN share some of the same functions from 0x09? */ +#define NCT6779D_GPIO_V 0x07 /* GPIO - 6,7,8 */ + +/* Virtual devices sharing the enables are encoded as follows: + VLDN = baseLDN[7:0] | [10:8] bitpos of enable in 0x30 of baseLDN +*/ + +/* No idea what I'm doing from this point on */ +#define NCT6779D_GPIO6 ((6 << 8) | NCT6779D_GPIO_V) +#define NCT6779D_GPIO7 ((7 << 8) | NCT6779D_GPIO_V) +#define NCT6779D_GPIO8 ((8 << 8) | NCT6779D_GPIO_V) + +/* NCT6779D_GPIO_ALL_V overlaps NCT6779D_GPIO_V (6,7,8 are overlapped) */ +#define NCT6779D_GPIO1_ALL ((1 << 8) | NCT6779D_GPIO_ALL_V) +#define NCT6779D_GPIO2_ALL ((2 << 8) | NCT6779D_GPIO_ALL_V) +#define NCT6779D_GPIO3_ALL ((3 << 8) | NCT6779D_GPIO_ALL_V) +#define NCT6779D_GPIO4_ALL ((4 << 8) | NCT6779D_GPIO_ALL_V) +#define NCT6779D_GPIO5_ALL ((5 << 8) | NCT6779D_GPIO_ALL_V) + +/* GPIO6,7,8_ALL need different values than GPIO6,7,8 to avoid being redefined */ +#define NCT6779D_GPIO6_ALL ((9 << 8) | NCT6779D_GPIO_ALL_V) +#define NCT6779D_GPIO7_ALL ((10 << 8) | NCT6779D_GPIO_ALL_V) +#define NCT6779D_GPIO8_ALL ((11 << 8) | NCT6779D_GPIO_ALL_V) + +#endif diff --git a/src/superio/nuvoton/nct6779d/superio.c b/src/superio/nuvoton/nct6779d/superio.c new file mode 100644 index 0000000..9076e30 --- /dev/null +++ b/src/superio/nuvoton/nct6779d/superio.c @@ -0,0 +1,68 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Alec Ari neotheuser@ymail.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <device/pnp.h> +#include <superio/conf_mode.h> +#include <stdlib.h> +#include "nct6779d.h" + +static void nct6779d_init(device_t dev) +{ +} + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = pnp_set_resources, + .enable_resources = pnp_enable_resources, + .enable = pnp_alt_enable, + .init = nct6779d_init, + .ops_pnp_mode = &pnp_conf_mode_8787_aa, +}; + +static struct pnp_info pnp_dev_info[] = { + /* Some 0x07f8, 0 values may be incorrect */ + /* Some might be missing PNP_IO1 and PNP_IRQ1 so please verify this */ + { &ops, NCT6779D_PAR, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, /* 0x01 */ + { &ops, NCT6779D_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, /* 0x02 */ + { &ops, NCT6779D_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, /* 0x03 */ + { &ops, NCT6779D_KBD, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, /* 0x05 */ + { &ops, NCT6779D_CIR, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, /* 0x06 */ + { &ops, NCT6779D_GPIO_WDT}, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, /* 0x08 */ + /* Simply just copied the rest of the non-virtual LDNs here */ + { &ops, NCT6779D_ACPI}, /* 0x0a */ + { &ops, NCT6779D_HWMN, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, /* 0x0b */ + { &ops, NCT6779D_WDT1}, /* 0x0d */ + { &ops, NCT6779D_CIRW, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, /* 0x0e */ + { &ops, NCT6779D_PPOD}, /* 0x0f */ + { &ops, NCT6779D_UART}, /* 0x14 */ + { &ops, NCT6779D_DSLP}, /* 0x16 */ + /* Insert GPIO stuff here */ +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); +} + +struct chip_operations superio_nuvoton_nct6779d_ops = { + CHIP_NAME("NUVOTON NCT6779D Super I/O") + .enable_dev = enable_dev, +};