Shreesh Chhabbi has uploaded a new patch set (#3) to the change originally created by Shreesh Chhabbi. ( https://review.coreboot.org/c/coreboot/+/42524 )
Change subject: mainboard/intel/tigerlake: Update SPD file for Micron MT53D1G64D8SQ-046 ......................................................................
mainboard/intel/tigerlake: Update SPD file for Micron MT53D1G64D8SQ-046
With previous SPD file, found that QS parts had boot issue. By updating few fields in SPD, boot issues are resolved.
Offset Current Updated Analysis 1 0x10 0x11 0x11 is correct SPD spec rev 1.1 5 0x19 0x21 0x21 is correct. 16 bits for Row addrs, 10 bits for Column addrs 6 0x95 0xB5 0xB5 is correct, 4 die, 2 ch per pkg, Byte 16 signal matrix 12 0x02 0x0A 0xA is correct, 2 ranks per ch, 16 bits device data width 18 0x05 0x04 0x4 is correct for 4267MTs support 29 0x90 0xC0 HW specific 30 0x06 0x68 HW specific 31 0xD0 0x60 HW specific 32 0x02 0x04 HW specific 125 0x00 0xE1 0xE1 is correct for 4267 MTs support
BUG=b:159319534 TEST=Booted on TGL UP3 RVP with ES2 and QS Parts
Change-Id: Ie506fbfe86a3ffb77763e8d9ef7e8aa69ea44bd3 Signed-off-by: Shreesh Chhabbi shreesh.chhabbi@intel.com --- M src/mainboard/intel/tglrvp/spd/Micron-MT53D1G64D8SQ-046.spd.hex 1 file changed, 32 insertions(+), 32 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/42524/3