[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Reorganize memory initialization support

[EricR Lai (Code Review)]

EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39865 )

Change subject: soc/intel/tigerlake: Reorganize memory initialization support
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Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/39865/2/src/soc/intel/tigerlake/mem... 
File src/soc/intel/tigerlake/meminit_tgl.c:

https://review.coreboot.org/c/coreboot/+/39865/2/src/soc/intel/tigerlake/mem... 
PS2, Line 22: static uint8_t get_dimm_cfg(uintptr_t dimm0, uintptr_t dimm1)
> Disabling of CH1 is not a problem. It is already supported. […]

I will give a shot. Because windows can do the same thing and we did it in CNL. Like SODIMM, we can choice just use CH0 or CH1, right? User can choice any slot to plug the memory.