Attention is currently required from: Maulik V Vaghela.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62272 )
Change subject: soc/intel/adl: Send EOP early in the boot sequence
......................................................................
Patch Set 11:
(1 comment)
File src/soc/intel/alderlake/chip.c:
https://review.coreboot.org/c/coreboot/+/62272/comment/198f6a2b_6798a7f8
PS11, Line 158: Intel CSE team recommends to send EOP close to FW init (between FSP-S exit and
: * current boot sequence) to reduce message response time from CSE hence moving
: * sending EOP to earlier stage.
what about cnl,tgl? is this a general recommendation?
The reason we are doing this is we have performance metrics to meet, and if you wait "too long", the CSE may start to become busy doing other things, and you end up polling for the response to EOP for dozens of milliseconds.
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