Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41943 )
Change subject: sb/intel/lynxpoint: Clean up code ......................................................................
Patch Set 6:
(4 comments)
Sorry, there was one thing I do care about: 96 column limit is for code and can hurt readability of text.
https://review.coreboot.org/c/coreboot/+/41943/6/src/southbridge/intel/lynxp... File src/southbridge/intel/lynxpoint/chip.h:
https://review.coreboot.org/c/coreboot/+/41943/6/src/southbridge/intel/lynxp... PS6, Line 108: #endif /* SOUTHBRIDGE_INTEL_LYNXPOINT_CHIP_H */ Nit, it was indented on purpose.
https://review.coreboot.org/c/coreboot/+/41943/6/src/southbridge/intel/lynxp... File src/southbridge/intel/lynxpoint/early_usb.c:
https://review.coreboot.org/c/coreboot/+/41943/6/src/southbridge/intel/lynxp... PS6, Line 24: */ Seems easier to read.
https://review.coreboot.org/c/coreboot/+/41943/6/src/southbridge/intel/lynxp... File src/southbridge/intel/lynxpoint/hda_verb.c:
https://review.coreboot.org/c/coreboot/+/41943/6/src/southbridge/intel/lynxp... PS6, Line 148: u32 viddid, const u32 **verb) Looks more balanced.
https://review.coreboot.org/c/coreboot/+/41943/6/src/southbridge/intel/lynxp... File src/southbridge/intel/lynxpoint/lpc.c:
https://review.coreboot.org/c/coreboot/+/41943/6/src/southbridge/intel/lynxp... PS6, Line 464: RCBA32_AND_OR(0x333c, 0xffcfffff, 0x00c00000); // SATA : : RCBA32_OR(0x38c0, 0x3c07); // SPI Dynamic : Not convinced this makes it better when there is nothing to align to.