Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/21295
Change subject: WIP: start port for G45 ......................................................................
WIP: start port for G45
Adds GPU_Port types G45 Config file Reuse PHC_* types for gmbus access (TODO offsets need fixing) Adapt helper for G45
Change-Id: Ifc05a1516329a61772af84558e5bfceb4d4ca277 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M common/hw-gfx-gma-config.ads.template M common/hw-gfx-gma-config_helpers.adb M common/hw-gfx-gma.ads A configs/g45 4 files changed, 40 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/95/21295/1
diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index e82b133..9402654 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -63,7 +63,7 @@ Use_PP_VDD_Override : constant Boolean := CPU <= Ivybridge;
----- PCH/FDI: --------- - Has_PCH : constant Boolean := CPU /= Broxton; + Has_PCH : constant Boolean := CPU /= Broxton and CPU /= G45; Has_PCH_DAC : constant Boolean := CPU in Ironlake .. Ivybridge or (CPU in Broadwell .. Haswell and CPU_Var = Normal); @@ -135,7 +135,11 @@ type Valid_Per_Port is array (Port_Type) of Boolean; type Valid_Per_GPU is array (CPU_Type) of Valid_Per_Port; Valid_Port_GPU : Valid_Per_GPU := - (Ironlake => + (G45 => + (Disabled => False, + Internal => Config.Internal_Display /= None, + others => True), + Ironlake => (Disabled => False, Internal => Config.Internal_Display = LVDS, others => True), @@ -226,6 +230,7 @@
Default_CDClk_Freq : constant Frequency_Type := (case CPU is + when G45 => 320_000_000, when Ironlake | Haswell | Broadwell => 450_000_000, @@ -236,6 +241,7 @@
Default_RawClk_Freq : constant Frequency_Type := (case CPU is + when G45 => 96_000_000, when Ironlake | Sandybridge | Ivybridge => 125_000_000, @@ -256,7 +262,7 @@
Maximum_Scalable_Width : constant Width_Per_Pipe := (case CPU is - when Ironlake..Haswell => + when G45..Haswell => (Primary => 4096, Secondary => 2048, Tertiary => 2048), @@ -274,17 +280,17 @@ ----------------------------------------------------------------------------
GTT_Offset : constant := (case CPU is - when Ironlake .. Haswell => 16#0020_0000#, + when G45 .. Haswell => 16#0020_0000#, when Broadwell .. Skylake => 16#0080_0000#);
GTT_Size : constant := (case CPU is - when Ironlake .. Haswell => 16#0020_0000#, + when G45 .. Haswell => 16#0020_0000#, -- Limit Broadwell to 4MiB to have a stable -- interface (i.e. same number of entries): when Broadwell .. Skylake => 16#0040_0000#);
GTT_PTE_Size : constant := (case CPU is - when Ironlake .. Haswell => 4, + when G45 .. Haswell => 4, when Broadwell .. Skylake => 8);
end HW.GFX.GMA.Config; diff --git a/common/hw-gfx-gma-config_helpers.adb b/common/hw-gfx-gma-config_helpers.adb index 0f60375..7fef8e6 100644 --- a/common/hw-gfx-gma-config_helpers.adb +++ b/common/hw-gfx-gma-config_helpers.adb @@ -30,22 +30,29 @@ begin return (case Config.CPU is + when G45 => + (case Port is + when Internal => LVDS, + when HDMI1 | DP1 => DIGI_B, + when HDMI2 | DP2 => DIGI_C, + when HDMI3 | DP3 => DIGI_D, + when Analog => VGA), when Ironlake .. Ivybridge => -- everything but eDP through FDI/PCH - (if Config.Internal_Is_EDP and then Port = Internal then + (if Config.Internal_Is_EDP and then Port = Internal then DIGI_A - else - (case Pipe is - -- FDIs are fixed to the CPU pipe - when Primary => DIGI_B, - when Secondary => DIGI_C, - when Tertiary => DIGI_D)), + else + (case Pipe is + -- FDIs are fixed to the CPU pipe + when Primary => DIGI_B, + when Secondary => DIGI_C, + when Tertiary => DIGI_D)), when Haswell .. Skylake => -- everything but VGA directly on CPU - (case Port is - when Internal => DIGI_A, -- LVDS not available - when HDMI1 | DP1 => DIGI_B, - when HDMI2 | DP2 => DIGI_C, - when HDMI3 | DP3 => DIGI_D, - when Analog => DIGI_E)); + (case Port is + when Internal => DIGI_A, -- LVDS not available + when HDMI1 | DP1 => DIGI_B, + when HDMI2 | DP2 => DIGI_C, + when HDMI3 | DP3 => DIGI_D, + when Analog => DIGI_E)); end To_GPU_Port;
function To_PCH_Port (Port : Active_Port_Type) return PCH_Port diff --git a/common/hw-gfx-gma.ads b/common/hw-gfx-gma.ads index 3771804..42e0d4e 100644 --- a/common/hw-gfx-gma.ads +++ b/common/hw-gfx-gma.ads @@ -30,7 +30,8 @@ is
type CPU_Type is - (Ironlake, + (G45, + Ironlake, Sandybridge, Ivybridge, Haswell, @@ -118,7 +119,7 @@ subtype Active_Port_Type is Port_Type range Port_Type'Succ (Disabled) .. Port_Type'Last;
- type GPU_Port is (DIGI_A, DIGI_B, DIGI_C, DIGI_D, DIGI_E); + type GPU_Port is (DIGI_A, DIGI_B, DIGI_C, DIGI_D, DIGI_E, LVDS, VGA, TV);
subtype Digital_Port is GPU_Port range DIGI_A .. DIGI_E;
diff --git a/configs/g45 b/configs/g45 new file mode 100644 index 0000000..6b54563 --- /dev/null +++ b/configs/g45 @@ -0,0 +1,5 @@ +CONFIG_GFX_GMA_CPU = G45 +CONFIG_GFX_GMA_CPU_VARIANT = Normal +CONFIG_GFX_GMA_INTERNAL_PORT = LVDS +CONFIG_GFX_GMA_ANALOG_I2C_PORT = PCH_DAC +CONFIG_GFX_GMA_DEFAULT_MMIO = 16#e000_0000#