[coreboot-gerrit] Change in coreboot[master]: soc/intel: Allow enable/disable ME via CMOS

[build bot (Jenkins) (Code Review)]

Attention is currently required from: SRIDHAR SIRICILLA, Furquan Shaikh, Paul Menzel, Rizwan Qureshi, Subrata Banik, Sridhar Siricilla, Arthur Heymans, Evgeny Zinoviev, Patrick Rudolph, Felix Held.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52800 )

Change subject: soc/intel: Allow enable/disable ME via CMOS
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Patch Set 86:

(2 comments)

File src/soc/intel/common/block/cse/cse.c:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133055):
https://review.coreboot.org/c/coreboot/+/52800/comment/9a81f31c_4664d402 
PS86, Line 1082: 		send = heci_send_receive(&me_disable, sizeof(me_disable), &disable_reply, &reply_size,
line over 96 characters

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133055):
https://review.coreboot.org/c/coreboot/+/52800/comment/7e0ce504_7c6b9545 
PS86, Line 1087: 		send = heci_send_receive(&me_enable, sizeof(me_enable), &enable_reply, &reply_size,
line over 96 characters