[coreboot-gerrit] Change in ...coreboot[master]: mb/google/kahlee: Enable 2T mode for liara in DVT phase

[chris wang (Code Review)]

Hello Chris Wang,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/29779

to review the following change.

Change subject: mb/google/kahlee: Enable 2T mode for liara in DVT phase
......................................................................

mb/google/kahlee: Enable 2T mode for liara in DVT phase

Change the board id detection to support rev5, since the 2T mode still
needed in DVT build.

BUG=b:116082728
TEST=verify by ODM.

Change-Id: Ibb4cc1fd2bb54984cb7a8856ed7b9f49b78eddce
Signed-off-by: Chris Wang 
---
M src/mainboard/google/kahlee/OemCustomize.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/29779/1

diff --git a/src/mainboard/google/kahlee/OemCustomize.c b/src/mainboard/google/kahlee/OemCustomize.c
index 12e5072..fc8ff32 100644
--- a/src/mainboard/google/kahlee/OemCustomize.c
+++ b/src/mainboard/google/kahlee/OemCustomize.c
@@ -58,7 +58,7 @@

void OemPostParams(AMD_POST_PARAMS *PostParams)
 {
-	if ((IS_ENABLED(CONFIG_BOARD_GOOGLE_LIARA)) && (board_id() <= 4))
+	if ((IS_ENABLED(CONFIG_BOARD_GOOGLE_LIARA)) && (board_id() <= 5))
    	PostParams->MemConfig.PlatformMemoryConfiguration =
    		(PSO_ENTRY *)DDR4LiaraMemoryConfiguration;
    else