Piotr Kleinschmidt has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35891 )
Change subject: src/southbridge/amd/pi/hudson/sata.c: set SATA in AHCI mode ......................................................................
src/southbridge/amd/pi/hudson/sata.c: set SATA in AHCI mode
The attempt to install pfSense ended up in a SATA driver error. Changing SATA mode from IDE to AHCI solved that issue.
Change-Id: I1b0322392712d797dd5a8931150c8d0ff1b60940 Signed-off-by: Piotr Kleinschmidt piotr.kleins@gmail.com --- M src/southbridge/amd/pi/hudson/sata.c 1 file changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/35891/1
diff --git a/src/southbridge/amd/pi/hudson/sata.c b/src/southbridge/amd/pi/hudson/sata.c index 08e967d..8e58390 100644 --- a/src/southbridge/amd/pi/hudson/sata.c +++ b/src/southbridge/amd/pi/hudson/sata.c @@ -32,6 +32,9 @@ #define UNLOCK_BIT (1<<0) #define SATA_CAPABILITIES_REG 0xFC #define CFG_CAP_SPM (1<<12) + #define SATA_REV_SUBCLASS_REG 0x08 + #define SUBCLASS_AHCI_MODE 0x60000 + #define SATA_PROGRAMIF_AHCI 0x100
volatile u32 *ahci_ptr = (u32*)(pci_read_config32(dev, AHCI_BASE_ADDRESS_REG) & 0xFFFFFF00); @@ -45,6 +48,11 @@ /* set the SATA AHCI mode to allow port expanders */ *(ahci_ptr + BYTE_TO_DWORD_OFFSET(SATA_CAPABILITIES_REG)) |= CFG_CAP_SPM;
+ /* enable AHCI mode */ + temp = pci_read_config32(dev, SATA_REV_SUBCLASS_REG); + temp = (temp & 0xFF0070FF) | SUBCLASS_AHCI_MODE | SATA_PROGRAMIF_AHCI; + pci_write_config32(dev, SATA_REV_SUBCLASS_REG, temp); + /* lock the write-protect */ temp = pci_read_config32(dev, MISC_CONTROL_REG); temp &= ~UNLOCK_BIT;