Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40500 )
Change subject: soc/intel/xeon_sp/skx: fix mem64 BAR assignment ......................................................................
Patch Set 3:
(6 comments)
https://review.coreboot.org/c/coreboot/+/40500/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/40500/2//COMMIT_MSG@9 PS2, Line 9: accomondated
accomodated
Done
https://review.coreboot.org/c/coreboot/+/40500/2//COMMIT_MSG@9 PS2, Line 9: BARS
BARs?
Done
https://review.coreboot.org/c/coreboot/+/40500/2//COMMIT_MSG@11 PS2, Line 11: accomondated
Ditto.
Done
https://review.coreboot.org/c/coreboot/+/40500/2//COMMIT_MSG@20 PS2, Line 20: optimized
optimize
Done
https://review.coreboot.org/c/coreboot/+/40500/2//COMMIT_MSG@20 PS2, Line 20: taken
take
Done
https://review.coreboot.org/c/coreboot/+/40500/2//COMMIT_MSG@20 PS2, Line 20: hile at this, optimized the code, and also taken into account : whether FSP HOB indicates that mem32 address space is used for : PCIe mem64 allocation or not.
Can this be split up in two commits?
Makes sense. It was split up in two commits.