[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Add Kconfig for recommended PCIe TBT resources

[Tim Wawrzynczak (Code Review)]

Attention is currently required from: Patrick Rudolph.
Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/51460 )

Change subject: soc/intel/alderlake: Add Kconfig for recommended PCIe TBT resources
......................................................................

soc/intel/alderlake: Add Kconfig for recommended PCIe TBT resources

The Intel ADL BIOS specification #627270 recommends reserving the
following resources for each PCIe TBT root port:
 - 42 buses
 - 192 MiB Non-prefetchable memory
 - 448 MiB Prefetchable memory

Add a mainboard Kconfig which will auto-select these recommended values,
in addition to PCIEXP_HOTPLUG.

Signed-off-by: Tim Wawrzynczak 
Change-Id: Icdfa2688d69c2db0f98d0523d5aba42eec1824db
---
M src/soc/intel/alderlake/Kconfig
1 file changed, 21 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/51460/1

diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index f22d1d4..f76b844 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -130,6 +130,27 @@
    hex
    default 0x10000

+# Intel recommends reserving the following resources per PCIe TBT root port,
+# from ADL BIOS Spec (doc #627270) Revision 0.6.0 Section 7.2.5.1.5
+# - 42 buses
+# - 194 MiB Non-prefetchable memory
+# - 448 MiB Prefetchable memory
+config ADL_MAINBOARD_SUPPORTS_PCIEXP_HOTPLUG
+	def_bool n
+	select PCIEXP_HOTPLUG
+
+config PCIEXP_HOTPLUG_BUSES
+        int
+        default 42 if ADL_MAINBOARD_SUPPORTS_PCIEXP_HOTPLUG
+
+config PCIEXP_HOTPLUG_MEM
+        hex
+        default 0xc200000 if ADL_MAINBOARD_SUPPORTS_PCIEXP_HOTPLUG  # 194 MiB
+
+config PCIEXP_HOTPLUG_PREFETCH_MEM
+        hex
+        default 0x1c000000 if ADL_MAINBOARD_SUPPORTS_PCIEXP_HOTPLUG # 448 MiB
+
 config MAX_PCH_ROOT_PORTS
    int
    default 10 if SOC_INTEL_ALDERLAKE_PCH_M