Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro, EricR Lai. Hello Furquan Shaikh, Nick Vaccaro, EricR Lai,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/58180
to look at the new patch set (#2).
Change subject: mb/google/brya: Clear SLP_S0_GATE_L on ACPI sleep entry ......................................................................
mb/google/brya: Clear SLP_S0_GATE_L on ACPI sleep entry
On brya platforms, the SLP_S0_L signal is gated to the rest of the platform by SLP_S0_GATE_L, which is under software control. Currently, this GPIO is not touched on the S5 shutdown path, leading to the rest of the platform observing the SLP_S0_L signal deassert far too late, and thus the EC gets confused.
Currently, the EC power state machine observes the following transitions during powerdown: S0->S3->S5->G3->S3->S5->G3
With this patch: S0->S3->S5->G3
BUG=b:186707518 TEST=observe power state transitions in EC console as described above
Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Change-Id: I5500e701ac8731d141b51dc381609c80047dc1f8 --- M src/mainboard/google/brya/mainboard.asl M src/mainboard/google/brya/wwan_power.asl 2 files changed, 18 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/58180/2