[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Update PCH and CPU PCIe RP table

[Furquan Shaikh (Code Review)]

Attention is currently required from: Nico Huber, Subrata Banik, Michael Niewöhner, EricR Lai.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49021 )

Change subject: soc/intel/alderlake: Update PCH and CPU PCIe RP table
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Patch Set 9: Code-Review+2

(2 comments)

File src/soc/intel/alderlake/pcie_rp.c:

https://review.coreboot.org/c/coreboot/+/49021/comment/3327fe43_74abff9a 
PS8, Line 18: static const struct pcie_rp_group cpu_rp_groups[] = {
> Done

Thanks Eric!

File src/soc/intel/alderlake/pcie_rp.c:

https://review.coreboot.org/c/coreboot/+/49021/comment/3cafcf03_217516ea 
PS9, Line 20: SSD1
I don't think we need to mention SSD1 / SSD2 here since it is mainboard-dependent.