[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Add known GPIO virtual wire information

[Furquan Shaikh (Code Review)]

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52589 )

Change subject: soc/intel/tigerlake: Add known GPIO virtual wire information
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Patch Set 6:

(1 comment)

File src/soc/intel/tigerlake/gpio.c:

https://review.coreboot.org/c/coreboot/+/52589/comment/5dc793f3_4b937004 
PS6, Line 106: 0x10
Might be good to add a macro for this.