Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34137 )
Change subject: soc/intel/common/lpss: Add function to check for a LPSS controller ......................................................................
Patch Set 6:
(4 comments)
https://review.coreboot.org/c/coreboot/+/34137/2/src/soc/intel/common/block/... File src/soc/intel/common/block/lpss/lpss.c:
https://review.coreboot.org/c/coreboot/+/34137/2/src/soc/intel/common/block/... PS2, Line 44: __weak const int *soc_lpss_controllers(int *size) : { : return NULL; : }
if you want enforce this for all soc then let's remove __weak function
Do not plan to implement it for apollolake and skylake for now. Currently added this for the irq implementation that would be supported CNL onwards, In future can remove it, if APL and SKL implements strong for it.
https://review.coreboot.org/c/coreboot/+/34137/3/src/soc/intel/common/block/... File src/soc/intel/common/block/lpss/lpss.c:
https://review.coreboot.org/c/coreboot/+/34137/3/src/soc/intel/common/block/... PS3, Line 44: __weak
LPSS controller check was currently needed for irq table implementation. […]
Done.
https://review.coreboot.org/c/coreboot/+/34137/4/src/soc/intel/common/block/... File src/soc/intel/common/block/lpss/lpss.c:
https://review.coreboot.org/c/coreboot/+/34137/4/src/soc/intel/common/block/... PS4, Line 80: is_dev_lpss
With the irq implementation yes, wanted to avoid SOC callbacks everytime.
Done
https://review.coreboot.org/c/coreboot/+/34137/4/src/soc/intel/common/block/... PS4, Line 87: dev->path.pci.devfn
certainly. Included the check now. Thanks.
Done