Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35548 )
Change subject: cpu/intel/common: Fix invalid MSR access
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Patch Set 1:
Patch Set 1: Code-Review+2
looks good and makes my Getac boot again without ugly hacks
Thanks. Could I have CB:34200 tested as well? Seems like we have given TSC precedence over LAPIC for timebase, once TSC_CONSTANT_RATE and tsc_freq_mhz() were introduced.
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