Paul Menzel (paulepanter@users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5101
-gerrit
commit 8658df41411e3f054bbe9f1efbf521eb974b4696 Author: Paul Menzel paulepanter@users.sourceforge.net Date: Sun Feb 2 22:05:48 2014 +0100
AMD K8 boards’ `romstage.c`: Spell sync*hr*onize correctly
$ git grep -l synconize | xargs sed -i 's/synconize/synchronize/g'
Change-Id: I92e6e7f1292f66642aa0336064a4eccba104dd08 Signed-off-by: Paul Menzel paulepanter@users.sourceforge.net --- src/mainboard/amd/serengeti_cheetah/romstage.c | 2 +- src/mainboard/asus/m2n-e/romstage.c | 2 +- src/mainboard/gigabyte/ga_2761gxdk/romstage.c | 2 +- src/mainboard/gigabyte/m57sli/romstage.c | 2 +- src/mainboard/hp/dl145_g3/romstage.c | 2 +- src/mainboard/hp/dl165_g6_fam10/romstage.c | 2 +- src/mainboard/iwill/dk8_htx/romstage.c | 2 +- src/mainboard/iwill/dk8s2/romstage.c | 2 +- src/mainboard/iwill/dk8x/romstage.c | 2 +- src/mainboard/msi/ms7260/romstage.c | 2 +- src/mainboard/msi/ms9185/romstage.c | 2 +- src/mainboard/msi/ms9282/romstage.c | 2 +- src/mainboard/msi/ms9652_fam10/romstage.c | 2 +- src/mainboard/nvidia/l1_2pvv/romstage.c | 2 +- src/mainboard/supermicro/h8dme/romstage.c | 2 +- src/mainboard/supermicro/h8dmr/romstage.c | 2 +- src/mainboard/supermicro/h8dmr_fam10/romstage.c | 2 +- src/mainboard/supermicro/h8qme_fam10/romstage.c | 2 +- src/mainboard/tyan/s2912/romstage.c | 2 +- src/mainboard/tyan/s2912_fam10/romstage.c | 2 +- 20 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c index b103389..98793af 100644 --- a/src/mainboard/amd/serengeti_cheetah/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah/romstage.c @@ -219,7 +219,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//do we need apci timer, tsc...., only debug need it for better output /* all ap stopped? */ -// init_timer(); // Need to use TMICT to synconize FID/VID +// init_timer(); // Need to use TMICT to synchronize FID/VID
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
diff --git a/src/mainboard/asus/m2n-e/romstage.c b/src/mainboard/asus/m2n-e/romstage.c index 2f3baf6..b6b79cc 100644 --- a/src/mainboard/asus/m2n-e/romstage.c +++ b/src/mainboard/asus/m2n-e/romstage.c @@ -140,7 +140,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* TODO: FIDVID */
- init_timer(); /* Need to use TMICT to synconize FID/VID. */ + init_timer(); /* Need to use TMICT to synchronize FID/VID. */
needs_reset |= optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c index 4d215ae..9fc932e 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c +++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c @@ -193,7 +193,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//do we need apci timer, tsc...., only debug need it for better output /* all ap stopped? */ -// init_timer(); // Need to use TMICT to synconize FID/VID +// init_timer(); // Need to use TMICT to synchronize FID/VID
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c index 77eae09..e551e84 100644 --- a/src/mainboard/gigabyte/m57sli/romstage.c +++ b/src/mainboard/gigabyte/m57sli/romstage.c @@ -178,7 +178,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif
- init_timer(); // Need to use TMICT to synconize FID/VID + init_timer(); // Need to use TMICT to synchronize FID/VID
needs_reset |= optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c index 0d8e9d2..61408ff 100644 --- a/src/mainboard/hp/dl145_g3/romstage.c +++ b/src/mainboard/hp/dl145_g3/romstage.c @@ -206,7 +206,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//do we need apci timer, tsc...., only debug need it for better output /* all ap stopped? */ - // init_timer(); // Need to use TMICT to synconize FID/VID + // init_timer(); // Need to use TMICT to synchronize FID/VID
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c index 8e109c5..5fb5602 100644 --- a/src/mainboard/hp/dl165_g6_fam10/romstage.c +++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c @@ -202,7 +202,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//do we need apci timer, tsc...., only debug need it for better output /* all ap stopped? */ -// init_timer(); // Need to use TMICT to synconize FID/VID +// init_timer(); // Need to use TMICT to synchronize FID/VID
printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c index 070fb07..3db0d96 100644 --- a/src/mainboard/iwill/dk8_htx/romstage.c +++ b/src/mainboard/iwill/dk8_htx/romstage.c @@ -151,7 +151,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//do we need apci timer, tsc...., only debug need it for better output /* all ap stopped? */ - init_timer(); // Need to use TMICT to synconize FID/VID + init_timer(); // Need to use TMICT to synchronize FID/VID sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
#if 0 diff --git a/src/mainboard/iwill/dk8s2/romstage.c b/src/mainboard/iwill/dk8s2/romstage.c index 7c8d4a5..6cfed96 100644 --- a/src/mainboard/iwill/dk8s2/romstage.c +++ b/src/mainboard/iwill/dk8s2/romstage.c @@ -152,7 +152,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//do we need apci timer, tsc...., only debug need it for better output /* all ap stopped? */ - init_timer(); // Need to use TMICT to synconize FID/VID + init_timer(); // Need to use TMICT to synchronize FID/VID sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
#if 0 diff --git a/src/mainboard/iwill/dk8x/romstage.c b/src/mainboard/iwill/dk8x/romstage.c index b5a1d71..ee7cd10 100644 --- a/src/mainboard/iwill/dk8x/romstage.c +++ b/src/mainboard/iwill/dk8x/romstage.c @@ -152,7 +152,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//do we need apci timer, tsc...., only debug need it for better output /* all ap stopped? */ - init_timer(); // Need to use TMICT to synconize FID/VID + init_timer(); // Need to use TMICT to synchronize FID/VID sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
#if 0 diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index 947de0b..206ded3 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -175,7 +175,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif
- init_timer(); /* Need to use TMICT to synconize FID/VID. */ + init_timer(); /* Need to use TMICT to synchronize FID/VID. */
needs_reset |= optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c index 2cb38a4..16e714e 100644 --- a/src/mainboard/msi/ms9185/romstage.c +++ b/src/mainboard/msi/ms9185/romstage.c @@ -211,7 +211,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//do we need apci timer, tsc...., only debug need it for better output /* all ap stopped? */ -// init_timer(); // Need to use TMICT to synconize FID/VID +// init_timer(); // Need to use TMICT to synchronize FID/VID
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c index 7f8d0e7..f6bd838 100644 --- a/src/mainboard/msi/ms9282/romstage.c +++ b/src/mainboard/msi/ms9282/romstage.c @@ -158,7 +158,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) #endif ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
- init_timer(); /* Need to use TMICT to synconize FID/VID. */ + init_timer(); /* Need to use TMICT to synchronize FID/VID. */
needs_reset = optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index b21fb02..2a38fb3 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -202,7 +202,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) msr=rdmsr(0xc0010071); printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo); #endif - init_timer(); /* Need to use TMICT to synconize FID/VID. */ + init_timer(); /* Need to use TMICT to synchronize FID/VID. */
wants_reset = mcp55_early_setup_x();
diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c index d6ee6c6..75448e6 100644 --- a/src/mainboard/nvidia/l1_2pvv/romstage.c +++ b/src/mainboard/nvidia/l1_2pvv/romstage.c @@ -167,7 +167,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif
- init_timer(); /* Need to use TMICT to synconize FID/VID. */ + init_timer(); /* Need to use TMICT to synchronize FID/VID. */
needs_reset |= optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c index df5e2c8..ae1d35d 100644 --- a/src/mainboard/supermicro/h8dme/romstage.c +++ b/src/mainboard/supermicro/h8dme/romstage.c @@ -242,7 +242,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif
- init_timer(); /* Need to use TMICT to synconize FID/VID. */ + init_timer(); /* Need to use TMICT to synchronize FID/VID. */
needs_reset |= optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c index 8ed7e6d..ff17b97 100644 --- a/src/mainboard/supermicro/h8dmr/romstage.c +++ b/src/mainboard/supermicro/h8dmr/romstage.c @@ -162,7 +162,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif
- init_timer(); // Need to use TMICT to synconize FID/VID + init_timer(); // Need to use TMICT to synchronize FID/VID
needs_reset |= optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c index 3f6ea70..328e1f5 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c +++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c @@ -199,7 +199,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) msr.hi, msr.lo); #endif
- init_timer(); // Need to use TMICT to synconize FID/VID + init_timer(); // Need to use TMICT to synchronize FID/VID
wants_reset = mcp55_early_setup_x();
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c index cca464c..f3a6a23 100644 --- a/src/mainboard/supermicro/h8qme_fam10/romstage.c +++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c @@ -249,7 +249,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo); #endif
- init_timer(); // Need to use TMICT to synconize FID/VID + init_timer(); // Need to use TMICT to synchronize FID/VID
wants_reset = mcp55_early_setup_x();
diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c index e4a1c65..9e2edb6 100644 --- a/src/mainboard/tyan/s2912/romstage.c +++ b/src/mainboard/tyan/s2912/romstage.c @@ -165,7 +165,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif
- init_timer(); // Need to use TMICT to synconize FID/VID + init_timer(); // Need to use TMICT to synchronize FID/VID
needs_reset |= optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index 9c86157..821ed1e 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -199,7 +199,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo); #endif
- init_timer(); // Need to use TMICT to synconize FID/VID + init_timer(); // Need to use TMICT to synchronize FID/VID
wants_reset = mcp55_early_setup_x();