Hello build bot (Jenkins), Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46246
to look at the new patch set (#2).
Change subject: mb/asrock/h110m/romstage.c: Correct FSP-M UPDs ......................................................................
mb/asrock/h110m/romstage.c: Correct FSP-M UPDs
The DQ and DQS byte maps do not apply to DDR4 configurations, and the RCOMP resistor and target values are not correct for SKL-S (or KBL-S). Drop the byte maps and use RCOMP values for the correct platform type.
RCOMP resistor values for all non-socketed platforms are listed in the Platform Design Guide, and also appear in schematics. For SKL-S, the RCOMP resistors are on the CPU and their values have been confirmed by measuring them on an i5-6400, and match the PDG values for SKL-H.
RCOMP target values can be guessed from Intel Document #573387 and some of them are also present in datasheet volume 1, under DC specifications.
Change-Id: I699d46b9b516be8946367e6d9b24883ae1e78d03 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/asrock/h110m/romstage.c 1 file changed, 13 insertions(+), 46 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/46246/2