Vladimir Serbinenko (phcoder@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4609
-gerrit
commit 786141ef2489bf347f6665ba6f8bc02139e38286 Author: Vladimir Serbinenko phcoder@gmail.com Date: Fri Jan 3 15:55:40 2014 +0100
ACPI: Remove CONFIG_GENERATE_ACPI_TABLES
As currently many systems would be barely functional without ACPI, always generate ACPI tables if supported.
Change-Id: I372dbd03101030c904dab153552a1291f3b63518 Signed-off-by: Vladimir Serbinenko phcoder@gmail.com --- src/Kconfig | 11 --- src/arch/armv7/Makefile.inc | 2 +- src/arch/x86/Makefile.inc | 2 +- src/arch/x86/boot/Makefile.inc | 4 +- src/arch/x86/boot/smbios.c | 2 +- src/arch/x86/boot/tables.c | 2 +- src/arch/x86/include/arch/acpi.h | 9 --- src/cpu/amd/model_fxx/Makefile.inc | 2 +- src/cpu/intel/fsp_model_206ax/Makefile.inc | 2 +- src/cpu/intel/haswell/Makefile.inc | 2 +- src/cpu/intel/model_2065x/Makefile.inc | 2 +- src/cpu/intel/model_206ax/Makefile.inc | 2 +- src/cpu/intel/speedstep/Makefile.inc | 3 +- src/lib/coreboot_table.c | 4 +- src/mainboard/advansus/a785e-i/mptable.c | 58 --------------- src/mainboard/amd/bimini_fam10/mptable.c | 58 --------------- src/mainboard/amd/dbm690t/mptable.c | 51 -------------- src/mainboard/amd/inagua/mptable.c | 63 ----------------- src/mainboard/amd/mahogany/mptable.c | 57 --------------- src/mainboard/amd/mahogany_fam10/mptable.c | 82 ---------------------- src/mainboard/amd/persimmon/mptable.c | 63 ----------------- src/mainboard/amd/pistachio/mptable.c | 51 -------------- src/mainboard/amd/south_station/mptable.c | 63 ----------------- src/mainboard/amd/tilapia_fam10/mptable.c | 57 --------------- src/mainboard/amd/torpedo/mptable.c | 71 ------------------- src/mainboard/amd/union_station/mptable.c | 63 ----------------- src/mainboard/asrock/939a785gmh/mptable.c | 57 --------------- src/mainboard/asrock/e350m1/mptable.c | 63 ----------------- src/mainboard/asus/m4a78-em/mptable.c | 57 --------------- src/mainboard/asus/m4a785-m/mptable.c | 57 --------------- src/mainboard/asus/m5a88-v/mptable.c | 58 --------------- src/mainboard/avalue/eax-785e/mptable.c | 59 ---------------- src/mainboard/emulation/qemu-i440fx/fw_cfg.c | 8 +-- src/mainboard/gigabyte/ma785gm/mptable.c | 57 --------------- src/mainboard/gigabyte/ma785gmt/mptable.c | 57 --------------- src/mainboard/gigabyte/ma78gm/mptable.c | 57 --------------- src/mainboard/gizmosphere/gizmo/mptable.c | 63 ----------------- src/mainboard/iei/kino-780am2-fam10/mptable.c | 82 ---------------------- src/mainboard/jetway/pa78vm5/mptable.c | 57 --------------- src/mainboard/kontron/kt690/mptable.c | 51 -------------- src/mainboard/lippert/frontrunner-af/mptable.c | 63 ----------------- src/mainboard/lippert/toucan-af/mptable.c | 63 ----------------- src/mainboard/roda/rk9/mainboard.c | 2 - src/mainboard/supermicro/h8scm_fam10/mptable.c | 41 ----------- src/mainboard/technexion/tim5690/mptable.c | 51 -------------- src/mainboard/technexion/tim8690/mptable.c | 51 -------------- src/northbridge/amd/agesa/family10/Makefile.inc | 2 +- src/northbridge/amd/agesa/family12/Makefile.inc | 2 +- src/northbridge/amd/amdfam10/Makefile.inc | 14 ++-- src/northbridge/amd/amdk8/Makefile.inc | 2 +- src/northbridge/intel/fsp_sandybridge/Makefile.inc | 2 +- src/northbridge/intel/gm45/Makefile.inc | 2 +- src/northbridge/intel/haswell/Makefile.inc | 2 +- src/northbridge/intel/i945/Makefile.inc | 2 +- src/northbridge/intel/nehalem/Makefile.inc | 2 +- src/northbridge/intel/sandybridge/Makefile.inc | 2 +- src/northbridge/intel/sch/Makefile.inc | 2 +- src/northbridge/intel/sch/acpi.c | 2 - src/southbridge/amd/agesa/hudson/Makefile.inc | 2 +- src/southbridge/amd/amd8111/acpi.c | 4 +- src/southbridge/amd/cimx/sb800/Makefile.inc | 2 +- src/southbridge/amd/sb700/Makefile.inc | 2 +- src/southbridge/amd/sb800/Makefile.inc | 2 +- src/southbridge/intel/i82371eb/Makefile.inc | 4 +- src/southbridge/nvidia/ck804/Makefile.inc | 2 +- src/southbridge/nvidia/mcp55/Makefile.inc | 2 +- src/southbridge/nvidia/mcp55/smbus.c | 4 +- src/southbridge/via/vt8237r/Makefile.inc | 2 +- 68 files changed, 45 insertions(+), 1857 deletions(-)
diff --git a/src/Kconfig b/src/Kconfig index 31a41ab..ab8a420 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -461,8 +461,6 @@ config HAVE_ACPI_TABLES help This variable specifies whether a given board has ACPI table support. It is usually set in mainboard/*/Kconfig. - Whether or not the ACPI tables are actually generated by coreboot - is configurable by the user via GENERATE_ACPI_TABLES.
config HAVE_MP_TABLE bool @@ -496,15 +494,6 @@ config MAX_PIRQ_LINKS
menu "System tables"
-config GENERATE_ACPI_TABLES - prompt "Generate ACPI tables" if HAVE_ACPI_TABLES - bool - default HAVE_ACPI_TABLES - help - Generate ACPI tables for this board. - - If unsure, say Y. - config GENERATE_MP_TABLE prompt "Generate an MP table" if HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC bool diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index dfd5164..4cf8d9d 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -200,7 +200,7 @@ endif ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y) ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c endif -ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y) +ifeq ($(CONFIG_HAVE_ACPI_TABLES),y) ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl # make doesn't have arithmetic operators or greater-than comparisons diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 80e731f..52c9c58 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -283,7 +283,7 @@ endif ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/reset.c),) ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c endif -ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y) +ifeq ($(CONFIG_HAVE_ACPI_TABLES),y) ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt2.asl),) diff --git a/src/arch/x86/boot/Makefile.inc b/src/arch/x86/boot/Makefile.inc index 629c644..5c13370 100644 --- a/src/arch/x86/boot/Makefile.inc +++ b/src/arch/x86/boot/Makefile.inc @@ -7,9 +7,9 @@ ramstage-y += tables.c ramstage-y += cbmem.c ramstage-$(CONFIG_GENERATE_MP_TABLE) += mpspec.c ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += pirq_routing.c -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c ramstage-$(CONFIG_GENERATE_SMBIOS_TABLES) += smbios.c -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpigen.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpigen.c ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S ramstage-$(CONFIG_RELOCATABLE_RAMSTAGE) += ramstage_module_header.c
diff --git a/src/arch/x86/boot/smbios.c b/src/arch/x86/boot/smbios.c index 65bf538..e98a775 100644 --- a/src/arch/x86/boot/smbios.c +++ b/src/arch/x86/boot/smbios.c @@ -164,7 +164,7 @@ static int smbios_write_type0(unsigned long *current, int handle) BIOS_CHARACTERISTICS_SELECTABLE_BOOT | BIOS_CHARACTERISTICS_UPGRADEABLE;
-#if CONFIG_GENERATE_ACPI_TABLES +#if CONFIG_HAVE_ACPI_TABLES t->bios_characteristics_ext1 = BIOS_EXT1_CHARACTERISTICS_ACPI; #endif t->bios_characteristics_ext2 = BIOS_EXT2_CHARACTERISTICS_TARGET; diff --git a/src/arch/x86/boot/tables.c b/src/arch/x86/boot/tables.c index e980ed8..fc1e21f 100644 --- a/src/arch/x86/boot/tables.c +++ b/src/arch/x86/boot/tables.c @@ -108,7 +108,7 @@ struct lb_memory *write_tables(void) } #endif /* CONFIG_GENERATE_MP_TABLE */
-#if CONFIG_GENERATE_ACPI_TABLES +#if CONFIG_HAVE_ACPI_TABLES #define MAX_ACPI_SIZE (45 * 1024) post_code(0x9c);
diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h index d73c046..2db143a 100644 --- a/src/arch/x86/include/arch/acpi.h +++ b/src/arch/x86/include/arch/acpi.h @@ -27,8 +27,6 @@ #ifndef __ASM_ACPI_H #define __ASM_ACPI_H
-#if CONFIG_GENERATE_ACPI_TABLES - #include <stdint.h>
#define RSDP_SIG "RSD PTR " /* RSDT pointer signature */ @@ -577,11 +575,4 @@ unsigned long acpi_add_ssdt_pstates(acpi_rsdp_t *rsdp, unsigned long current); /* cpu/intel/speedstep/acpi.c */ void generate_cpu_entries(void);
-#else // CONFIG_GENERATE_ACPI_TABLES - -#define write_acpi_tables(start) (start) -#define acpi_slp_type 0 - -#endif /* CONFIG_GENERATE_ACPI_TABLES */ - #endif /* __ASM_ACPI_H */ diff --git a/src/cpu/amd/model_fxx/Makefile.inc b/src/cpu/amd/model_fxx/Makefile.inc index eb62640..cf4ac21 100644 --- a/src/cpu/amd/model_fxx/Makefile.inc +++ b/src/cpu/amd/model_fxx/Makefile.inc @@ -4,4 +4,4 @@ romstage-y += ../../x86/mtrr/earlymtrr.c ramstage-y += model_fxx_init.c ramstage-y += model_fxx_update_microcode.c ramstage-y += processor_name.c -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += powernow_acpi.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c diff --git a/src/cpu/intel/fsp_model_206ax/Makefile.inc b/src/cpu/intel/fsp_model_206ax/Makefile.inc index 1ea9c2a..4ec6722 100644 --- a/src/cpu/intel/fsp_model_206ax/Makefile.inc +++ b/src/cpu/intel/fsp_model_206ax/Makefile.inc @@ -1,7 +1,7 @@ ramstage-y += model_206ax_init.c subdirs-y += ../../x86/name
-ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c +ramstage-y += acpi.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index 60c061d..545cef2 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -5,7 +5,7 @@ ramstage-y += tsc_freq.c romstage-y += romstage.c romstage-y += tsc_freq.c
-ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c +ramstage-y += acpi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c ramstage-$(CONFIG_MONOTONIC_TIMER_MSR) += monotonic_timer.c
diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc index 3b3fc4e..c21a4b5 100644 --- a/src/cpu/intel/model_2065x/Makefile.inc +++ b/src/cpu/intel/model_2065x/Makefile.inc @@ -13,7 +13,7 @@ ramstage-y += tsc_freq.c romstage-y += tsc_freq.c smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
-ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c +ramstage-y += acpi.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc index a324b64..32a5eff 100644 --- a/src/cpu/intel/model_206ax/Makefile.inc +++ b/src/cpu/intel/model_206ax/Makefile.inc @@ -1,7 +1,7 @@ ramstage-y += model_206ax_init.c subdirs-y += ../../x86/name
-ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c +ramstage-y += acpi.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
diff --git a/src/cpu/intel/speedstep/Makefile.inc b/src/cpu/intel/speedstep/Makefile.inc index 130eb0c..eddd4f3 100644 --- a/src/cpu/intel/speedstep/Makefile.inc +++ b/src/cpu/intel/speedstep/Makefile.inc @@ -1,2 +1 @@ -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c speedstep.c -ramstage-$(CONFIG_CPU_INTEL_MODEL_1067X) += speedstep.c +ramstage-y += acpi.c speedstep.c diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index d5dc14c..d557f0e 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -31,7 +31,7 @@ #include <cbmem.h> #include <memrange.h> #if CONFIG_CHROMEOS -#if CONFIG_GENERATE_ACPI_TABLES +#if CONFIG_HAVE_ACPI_TABLES #include <arch/acpi.h> #endif #include <vendorcode/google/chromeos/chromeos.h> @@ -191,7 +191,7 @@ static void lb_gpios(struct lb_header *header)
static void lb_vdat(struct lb_header *header) { -#if CONFIG_GENERATE_ACPI_TABLES +#if CONFIG_HAVE_ACPI_TABLES struct lb_vdat* vdat;
vdat = (struct lb_vdat *)lb_new_record(header); diff --git a/src/mainboard/advansus/a785e-i/mptable.c b/src/mainboard/advansus/a785e-i/mptable.c index 73ada4d..8c03a0c 100644 --- a/src/mainboard/advansus/a785e-i/mptable.c +++ b/src/mainboard/advansus/a785e-i/mptable.c @@ -76,64 +76,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb800, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb800, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - PCI_INT(0x0, 0x14, 0x0, 0x10); - /* HD Audio: */ - PCI_INT(0x0, 0x14, 0x2, 0x12); - - PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */ - PCI_INT(0x0, 0x12, 0x1, intr_data[0x31]); - PCI_INT(0x0, 0x13, 0x0, intr_data[0x32]); - PCI_INT(0x0, 0x13, 0x1, intr_data[0x33]); - PCI_INT(0x0, 0x16, 0x0, intr_data[0x34]); - PCI_INT(0x0, 0x16, 0x1, intr_data[0x35]); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); - - /* on board NIC & Slot PCIE. */ - /* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */ -/* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */ - PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */ - /* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */ - PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10); - /* configuration B doesnt need dev 5,6,7 */ - /* - * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11); - * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12); - * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13); - */ - PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11); - PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb800[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb800[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb800[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb800[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb800[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb800[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb800[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb800[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb800[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb800[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb800[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb800[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/amd/bimini_fam10/mptable.c b/src/mainboard/amd/bimini_fam10/mptable.c index 792fa41..0570c6e 100644 --- a/src/mainboard/amd/bimini_fam10/mptable.c +++ b/src/mainboard/amd/bimini_fam10/mptable.c @@ -80,64 +80,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb800, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb800, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - PCI_INT(0x0, 0x14, 0x0, 0x10); - /* HD Audio: */ - PCI_INT(0x0, 0x14, 0x2, 0x12); - - PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */ - PCI_INT(0x0, 0x12, 0x1, intr_data[0x31]); - PCI_INT(0x0, 0x13, 0x0, intr_data[0x32]); - PCI_INT(0x0, 0x13, 0x1, intr_data[0x33]); - PCI_INT(0x0, 0x16, 0x0, intr_data[0x34]); - PCI_INT(0x0, 0x16, 0x1, intr_data[0x35]); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); - - /* on board NIC & Slot PCIE. */ - /* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */ -/* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */ - PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */ - /* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */ - PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10); - /* configuration B doesnt need dev 5,6,7 */ - /* - * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11); - * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12); - * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13); - */ - PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11); - PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb800[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb800[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb800[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb800[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb800[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb800[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb800[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb800[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb800[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb800[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb800[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb800[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/amd/dbm690t/mptable.c b/src/mainboard/amd/dbm690t/mptable.c index 8ef9138..09d137a 100644 --- a/src/mainboard/amd/dbm690t/mptable.c +++ b/src/mainboard/amd/dbm690t/mptable.c @@ -97,57 +97,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb600, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb600, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* usb */ - PCI_INT(0x0, 0x13, 0x0, 0x10); - PCI_INT(0x0, 0x13, 0x1, 0x11); - PCI_INT(0x0, 0x13, 0x2, 0x12); - PCI_INT(0x0, 0x13, 0x3, 0x13); - - /* sata */ - PCI_INT(0x0, 0x12, 0x0, 0x16); - - /* HD Audio: b0:d20:f1:reg63 should be 0. */ - PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* on board NIC & Slot PCIE. */ - PCI_INT(bus_rs690[1], 0x5, 0x0, 0x12); - PCI_INT(bus_rs690[1], 0x5, 0x1, 0x13); - PCI_INT(bus_rs690[2], 0x0, 0x0, 0x12); - PCI_INT(bus_rs690[3], 0x0, 0x0, 0x13); - PCI_INT(bus_rs690[4], 0x0, 0x0, 0x10); - PCI_INT(bus_rs690[5], 0x0, 0x0, 0x11); - PCI_INT(bus_rs690[6], 0x0, 0x0, 0x12); - PCI_INT(bus_rs690[7], 0x0, 0x0, 0x13); - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb600[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb600[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb600[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb600[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb600[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb600[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb600[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb600[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb600[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb600[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb600[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb600[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/amd/inagua/mptable.c b/src/mainboard/amd/inagua/mptable.c index 7352205..36b91b6 100644 --- a/src/mainboard/amd/inagua/mptable.c +++ b/src/mainboard/amd/inagua/mptable.c @@ -84,69 +84,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb800, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb800, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* APU Internal Graphic Device*/ - PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); - PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); - - //PCI_INT(0x0, 0x14, 0x1, 0x11); /* IDE. */ - PCI_INT(0x0, 0x14, 0x0, 0x10); - /* Southbridge HD Audio: */ - PCI_INT(0x0, 0x14, 0x2, 0x12); - - PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */ - PCI_INT(0x0, 0x12, 0x1, intr_data[0x31]); - PCI_INT(0x0, 0x13, 0x0, intr_data[0x32]); - PCI_INT(0x0, 0x13, 0x1, intr_data[0x33]); - PCI_INT(0x0, 0x16, 0x0, intr_data[0x34]); - PCI_INT(0x0, 0x16, 0x1, intr_data[0x35]); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); - - /* on board NIC & Slot PCIE. */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb800[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb800[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb800[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb800[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb800[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb800[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb800[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb800[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb800[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb800[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb800[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb800[1], 0x7, 0x3, 0x15); - - PCI_INT(bus_sb800[2], 0x0, 0x0, 0x12); - PCI_INT(bus_sb800[2], 0x0, 0x1, 0x13); - PCI_INT(bus_sb800[2], 0x0, 0x2, 0x14); - - /* PCIe PortA */ - PCI_INT(0x0, 0x15, 0x0, 0x10); - /* PCIe PortB */ - PCI_INT(0x0, 0x15, 0x1, 0x11); - /* PCIe PortC */ - PCI_INT(0x0, 0x15, 0x2, 0x12); - /* PCIe PortD */ - PCI_INT(0x0, 0x15, 0x3, 0x13); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/amd/mahogany/mptable.c b/src/mainboard/amd/mahogany/mptable.c index e83837d..bd31846 100644 --- a/src/mainboard/amd/mahogany/mptable.c +++ b/src/mainboard/amd/mahogany/mptable.c @@ -98,63 +98,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb700, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb700, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* usb */ - PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */ - PCI_INT(0x0, 0x12, 0x1, 0x11); - PCI_INT(0x0, 0x13, 0x0, 0x12); - PCI_INT(0x0, 0x13, 0x1, 0x13); - PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, 0x16); - - /* HD Audio: b0:d20:f1:reg63 should be 0. */ - /* PCI_INT(0x0, 0x14, 0x2, 0x12); */ - - /* on board NIC & Slot PCIE. */ - /* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */ -/* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */ - PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */ - /* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */ - PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10); - /* configuration B doesnt need dev 5,6,7 */ - /* - * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11); - * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12); - * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13); - */ - PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11); - PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb700[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb700[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb700[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb700[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb700[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb700[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb700[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb700[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb700[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb700[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb700[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb700[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/amd/mahogany_fam10/mptable.c b/src/mainboard/amd/mahogany_fam10/mptable.c index 9f5eb12..11426c2 100644 --- a/src/mainboard/amd/mahogany_fam10/mptable.c +++ b/src/mainboard/amd/mahogany_fam10/mptable.c @@ -97,88 +97,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb700, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb700, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* changes added to match acpi tables */ - PCI_INT(0x0, 0x02, 0x0, 0x12); - PCI_INT(0x0, 0x03, 0x0, 0x13); - PCI_INT(0x0, 0x04, 0x0, 0x10); - PCI_INT(0x0, 0x09, 0x0, 0x11); - PCI_INT(0x0, 0x0A, 0x0, 0x12); - PCI_INT(0x0, 0x12, 0x2, 0x12); - PCI_INT(0x0, 0x12, 0x3, 0x13); - PCI_INT(0x0, 0x13, 0x2, 0x10); - PCI_INT(0x0, 0x13, 0x2, 0x11); - PCI_INT(0x0, 0x14, 0x1, 0x11); - PCI_INT(0x0, 0x14, 0x3, 0x13); - PCI_INT(0x1, 0x05, 0x2, 0x10); - PCI_INT(0x1, 0x05, 0x3, 0x11); - PCI_INT(0x2, 0x00, 0x0, 0x12); - PCI_INT(0x2, 0x00, 0x1, 0x13); - PCI_INT(0x2, 0x00, 0x2, 0x10); - PCI_INT(0x2, 0x00, 0x3, 0x11); - - /* RS780 PCI to PCI bridge (PCIE port 4) */ - PCI_INT(0x0, 0x09, 0x0, 0x11); - - /* usb */ - PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */ - PCI_INT(0x0, 0x12, 0x1, 0x11); - PCI_INT(0x0, 0x13, 0x0, 0x12); - PCI_INT(0x0, 0x13, 0x1, 0x13); - PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, 0x16); - - /* HD Audio: b0:d20:f1:reg63 should be 0. */ - PCI_INT(0x0, 0x14, 0x2, 0x12); - - /* on board NIC & Slot PCIE. */ - /* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */ - /* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */ - PCI_INT(0x1, 0x5, 0x0, 0x12); /* VGA */ - PCI_INT(0x1, 0x5, 0x1, 0x13); /* Audio */ - /* PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); *//* Dev 2, external GFX */ - /* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */ - /* PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10); */ - /* configuration B doesnt need dev 5,6,7 */ - /* - * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11); - * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12); - * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13); - */ - /* PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11); */ - PCI_INT(0x3, 0x0, 0x0, 0x11); /* NIC */ - /* PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); NIC */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb700[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb700[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb700[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb700[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb700[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb700[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb700[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb700[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb700[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb700[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb700[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb700[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/amd/persimmon/mptable.c b/src/mainboard/amd/persimmon/mptable.c index 6b8aaa6..c115bda 100644 --- a/src/mainboard/amd/persimmon/mptable.c +++ b/src/mainboard/amd/persimmon/mptable.c @@ -80,69 +80,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb800, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb800, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* APU Internal Graphic Device*/ - PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); - PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); - - //PCI_INT(0x0, 0x14, 0x1, 0x11); /* IDE. */ - PCI_INT(0x0, 0x14, 0x0, 0x10); - /* Southbridge HD Audio: */ - PCI_INT(0x0, 0x14, 0x2, 0x12); - - PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */ - PCI_INT(0x0, 0x12, 0x1, intr_data[0x31]); - PCI_INT(0x0, 0x13, 0x0, intr_data[0x32]); - PCI_INT(0x0, 0x13, 0x1, intr_data[0x33]); - PCI_INT(0x0, 0x16, 0x0, intr_data[0x34]); - PCI_INT(0x0, 0x16, 0x1, intr_data[0x35]); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); - - /* on board NIC & Slot PCIE. */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb800[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb800[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb800[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb800[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb800[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb800[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb800[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb800[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb800[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb800[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb800[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb800[1], 0x7, 0x3, 0x15); - - PCI_INT(bus_sb800[2], 0x0, 0x0, 0x12); - PCI_INT(bus_sb800[2], 0x0, 0x1, 0x13); - PCI_INT(bus_sb800[2], 0x0, 0x2, 0x14); - - /* PCIe PortA */ - PCI_INT(0x0, 0x15, 0x0, 0x10); - /* PCIe PortB */ - PCI_INT(0x0, 0x15, 0x1, 0x11); - /* PCIe PortC */ - PCI_INT(0x0, 0x15, 0x2, 0x12); - /* PCIe PortD */ - PCI_INT(0x0, 0x15, 0x3, 0x13); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/amd/pistachio/mptable.c b/src/mainboard/amd/pistachio/mptable.c index 8ef9138..09d137a 100644 --- a/src/mainboard/amd/pistachio/mptable.c +++ b/src/mainboard/amd/pistachio/mptable.c @@ -97,57 +97,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb600, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb600, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* usb */ - PCI_INT(0x0, 0x13, 0x0, 0x10); - PCI_INT(0x0, 0x13, 0x1, 0x11); - PCI_INT(0x0, 0x13, 0x2, 0x12); - PCI_INT(0x0, 0x13, 0x3, 0x13); - - /* sata */ - PCI_INT(0x0, 0x12, 0x0, 0x16); - - /* HD Audio: b0:d20:f1:reg63 should be 0. */ - PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* on board NIC & Slot PCIE. */ - PCI_INT(bus_rs690[1], 0x5, 0x0, 0x12); - PCI_INT(bus_rs690[1], 0x5, 0x1, 0x13); - PCI_INT(bus_rs690[2], 0x0, 0x0, 0x12); - PCI_INT(bus_rs690[3], 0x0, 0x0, 0x13); - PCI_INT(bus_rs690[4], 0x0, 0x0, 0x10); - PCI_INT(bus_rs690[5], 0x0, 0x0, 0x11); - PCI_INT(bus_rs690[6], 0x0, 0x0, 0x12); - PCI_INT(bus_rs690[7], 0x0, 0x0, 0x13); - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb600[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb600[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb600[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb600[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb600[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb600[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb600[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb600[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb600[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb600[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb600[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb600[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/amd/south_station/mptable.c b/src/mainboard/amd/south_station/mptable.c index e9175d8..575d391 100644 --- a/src/mainboard/amd/south_station/mptable.c +++ b/src/mainboard/amd/south_station/mptable.c @@ -80,69 +80,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb800, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb800, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* APU Internal Graphic Device*/ - PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); - PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); - - //PCI_INT(0x0, 0x14, 0x1, 0x11); /* IDE. */ - PCI_INT(0x0, 0x14, 0x0, 0x10); - /* Southbridge HD Audio: */ - PCI_INT(0x0, 0x14, 0x2, 0x12); - - PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */ - PCI_INT(0x0, 0x12, 0x1, intr_data[0x31]); - PCI_INT(0x0, 0x13, 0x0, intr_data[0x32]); - PCI_INT(0x0, 0x13, 0x1, intr_data[0x33]); - PCI_INT(0x0, 0x16, 0x0, intr_data[0x34]); - PCI_INT(0x0, 0x16, 0x1, intr_data[0x35]); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); - - /* on board NIC & Slot PCIE. */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb800[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb800[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb800[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb800[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb800[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb800[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb800[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb800[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb800[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb800[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb800[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb800[1], 0x7, 0x3, 0x15); - - PCI_INT(bus_sb800[2], 0x0, 0x0, 0x12); - PCI_INT(bus_sb800[2], 0x0, 0x1, 0x13); - PCI_INT(bus_sb800[2], 0x0, 0x2, 0x14); - - /* PCIe PortA */ - PCI_INT(0x0, 0x15, 0x0, 0x10); - /* PCIe PortB */ - PCI_INT(0x0, 0x15, 0x1, 0x11); - /* PCIe PortC */ - PCI_INT(0x0, 0x15, 0x2, 0x12); - /* PCIe PortD */ - PCI_INT(0x0, 0x15, 0x3, 0x13); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/amd/tilapia_fam10/mptable.c b/src/mainboard/amd/tilapia_fam10/mptable.c index c4ec478..11426c2 100644 --- a/src/mainboard/amd/tilapia_fam10/mptable.c +++ b/src/mainboard/amd/tilapia_fam10/mptable.c @@ -97,63 +97,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb700, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb700, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* usb */ - PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */ - PCI_INT(0x0, 0x12, 0x1, 0x11); - PCI_INT(0x0, 0x13, 0x0, 0x12); - PCI_INT(0x0, 0x13, 0x1, 0x13); - PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, 0x16); - - /* HD Audio: b0:d20:f1:reg63 should be 0. */ - /* PCI_INT(0x0, 0x14, 0x2, 0x12); */ - - /* on board NIC & Slot PCIE. */ - /* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */ -/* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */ - PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */ - /* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */ - PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10); - /* configuration B doesnt need dev 5,6,7 */ - /* - * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11); - * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12); - * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13); - */ - PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11); - PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb700[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb700[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb700[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb700[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb700[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb700[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb700[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb700[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb700[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb700[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb700[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb700[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/amd/torpedo/mptable.c b/src/mainboard/amd/torpedo/mptable.c index da97d6a..cbe6639 100644 --- a/src/mainboard/amd/torpedo/mptable.c +++ b/src/mainboard/amd/torpedo/mptable.c @@ -161,77 +161,6 @@ static void *smp_write_config_table(void *v) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_sb900, 0xe); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_sb900, 0xf);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, int_sign, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), apicid_sb900, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* Internal VGA */ - PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); - PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); - - /* SMBUS */ - PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* HD Audio */ - PCI_INT(0x0, 0x14, 0x0, intr_data[0x13]); - - /* USB */ - PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); - PCI_INT(0x0, 0x12, 0x1, intr_data[0x31]); - PCI_INT(0x0, 0x13, 0x0, intr_data[0x32]); - PCI_INT(0x0, 0x13, 0x1, intr_data[0x33]); - PCI_INT(0x0, 0x16, 0x0, intr_data[0x34]); - PCI_INT(0x0, 0x16, 0x1, intr_data[0x35]); - PCI_INT(0x0, 0x14, 0x2, intr_data[0x36]); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, intr_data[0x40]); - PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); - - - /* on board NIC & Slot PCIE. */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb900[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb900[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb900[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb900[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb900[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb900[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb900[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb900[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb900[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb900[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb900[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb900[1], 0x7, 0x3, 0x15); - - PCI_INT(bus_sb900[1], 0x0, 0x0, 0x12); - PCI_INT(bus_sb900[1], 0x0, 0x1, 0x13); - PCI_INT(bus_sb900[1], 0x0, 0x2, 0x14); - - /* PCIe Lan*/ - PCI_INT(0x0, 0x06, 0x0, 0x13); - - /* FCH PCIe PortA */ - PCI_INT(0x0, 0x15, 0x0, 0x10); - /* FCH PCIe PortB */ - PCI_INT(0x0, 0x15, 0x1, 0x11); - /* FCH PCIe PortC */ - PCI_INT(0x0, 0x15, 0x2, 0x12); - /* FCH PCIe PortD */ - PCI_INT(0x0, 0x15, 0x3, 0x13); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/amd/union_station/mptable.c b/src/mainboard/amd/union_station/mptable.c index e9175d8..575d391 100644 --- a/src/mainboard/amd/union_station/mptable.c +++ b/src/mainboard/amd/union_station/mptable.c @@ -80,69 +80,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb800, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb800, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* APU Internal Graphic Device*/ - PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); - PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); - - //PCI_INT(0x0, 0x14, 0x1, 0x11); /* IDE. */ - PCI_INT(0x0, 0x14, 0x0, 0x10); - /* Southbridge HD Audio: */ - PCI_INT(0x0, 0x14, 0x2, 0x12); - - PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */ - PCI_INT(0x0, 0x12, 0x1, intr_data[0x31]); - PCI_INT(0x0, 0x13, 0x0, intr_data[0x32]); - PCI_INT(0x0, 0x13, 0x1, intr_data[0x33]); - PCI_INT(0x0, 0x16, 0x0, intr_data[0x34]); - PCI_INT(0x0, 0x16, 0x1, intr_data[0x35]); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); - - /* on board NIC & Slot PCIE. */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb800[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb800[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb800[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb800[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb800[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb800[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb800[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb800[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb800[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb800[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb800[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb800[1], 0x7, 0x3, 0x15); - - PCI_INT(bus_sb800[2], 0x0, 0x0, 0x12); - PCI_INT(bus_sb800[2], 0x0, 0x1, 0x13); - PCI_INT(bus_sb800[2], 0x0, 0x2, 0x14); - - /* PCIe PortA */ - PCI_INT(0x0, 0x15, 0x0, 0x10); - /* PCIe PortB */ - PCI_INT(0x0, 0x15, 0x1, 0x11); - /* PCIe PortC */ - PCI_INT(0x0, 0x15, 0x2, 0x12); - /* PCIe PortD */ - PCI_INT(0x0, 0x15, 0x3, 0x13); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/asrock/939a785gmh/mptable.c b/src/mainboard/asrock/939a785gmh/mptable.c index 8e663ec..790d1da 100644 --- a/src/mainboard/asrock/939a785gmh/mptable.c +++ b/src/mainboard/asrock/939a785gmh/mptable.c @@ -96,63 +96,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb700, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb700, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* usb */ - PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */ - PCI_INT(0x0, 0x12, 0x1, 0x11); - PCI_INT(0x0, 0x13, 0x0, 0x12); - PCI_INT(0x0, 0x13, 0x1, 0x13); - PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, 0x16); - - /* HD Audio: b0:d20:f1:reg63 should be 0. */ - /* PCI_INT(0x0, 0x14, 0x2, 0x12); */ - - /* on board NIC & Slot PCIE. */ - /* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */ -/* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */ - PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */ - /* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */ - PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10); - /* configuration B doesnt need dev 5,6,7 */ - /* - * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11); - * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12); - * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13); - */ - PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11); - PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb700[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb700[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb700[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb700[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb700[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb700[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb700[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb700[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb700[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb700[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb700[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb700[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/asrock/e350m1/mptable.c b/src/mainboard/asrock/e350m1/mptable.c index 95df2a6..c2e08b5 100644 --- a/src/mainboard/asrock/e350m1/mptable.c +++ b/src/mainboard/asrock/e350m1/mptable.c @@ -80,69 +80,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb800, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb800, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* APU Internal Graphic Device*/ - PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); - PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); - - //PCI_INT(0x0, 0x14, 0x1, 0x11); /* IDE. */ - PCI_INT(0x0, 0x14, 0x0, 0x10); - /* Southbridge HD Audio: */ - PCI_INT(0x0, 0x14, 0x2, 0x12); - - PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */ - PCI_INT(0x0, 0x12, 0x1, intr_data[0x31]); - PCI_INT(0x0, 0x13, 0x0, intr_data[0x32]); - PCI_INT(0x0, 0x13, 0x1, intr_data[0x33]); - PCI_INT(0x0, 0x16, 0x0, intr_data[0x34]); - PCI_INT(0x0, 0x16, 0x1, intr_data[0x35]); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); - - /* on board NIC & Slot PCIE. */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb800[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb800[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb800[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb800[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb800[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb800[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb800[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb800[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb800[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb800[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb800[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb800[1], 0x7, 0x3, 0x15); - - PCI_INT(bus_sb800[2], 0x0, 0x0, 0x12); - PCI_INT(bus_sb800[2], 0x0, 0x1, 0x13); - PCI_INT(bus_sb800[2], 0x0, 0x2, 0x14); - - /* PCIe PortA */ - PCI_INT(0x0, 0x15, 0x0, 0x10); - /* PCIe PortB */ - PCI_INT(0x0, 0x15, 0x1, 0x11); - /* PCIe PortC */ - PCI_INT(0x0, 0x15, 0x2, 0x12); - /* PCIe PortD */ - PCI_INT(0x0, 0x15, 0x3, 0x13); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/asus/m4a78-em/mptable.c b/src/mainboard/asus/m4a78-em/mptable.c index c4ec478..11426c2 100644 --- a/src/mainboard/asus/m4a78-em/mptable.c +++ b/src/mainboard/asus/m4a78-em/mptable.c @@ -97,63 +97,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb700, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb700, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* usb */ - PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */ - PCI_INT(0x0, 0x12, 0x1, 0x11); - PCI_INT(0x0, 0x13, 0x0, 0x12); - PCI_INT(0x0, 0x13, 0x1, 0x13); - PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, 0x16); - - /* HD Audio: b0:d20:f1:reg63 should be 0. */ - /* PCI_INT(0x0, 0x14, 0x2, 0x12); */ - - /* on board NIC & Slot PCIE. */ - /* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */ -/* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */ - PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */ - /* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */ - PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10); - /* configuration B doesnt need dev 5,6,7 */ - /* - * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11); - * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12); - * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13); - */ - PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11); - PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb700[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb700[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb700[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb700[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb700[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb700[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb700[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb700[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb700[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb700[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb700[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb700[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/asus/m4a785-m/mptable.c b/src/mainboard/asus/m4a785-m/mptable.c index c4ec478..11426c2 100644 --- a/src/mainboard/asus/m4a785-m/mptable.c +++ b/src/mainboard/asus/m4a785-m/mptable.c @@ -97,63 +97,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb700, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb700, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* usb */ - PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */ - PCI_INT(0x0, 0x12, 0x1, 0x11); - PCI_INT(0x0, 0x13, 0x0, 0x12); - PCI_INT(0x0, 0x13, 0x1, 0x13); - PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, 0x16); - - /* HD Audio: b0:d20:f1:reg63 should be 0. */ - /* PCI_INT(0x0, 0x14, 0x2, 0x12); */ - - /* on board NIC & Slot PCIE. */ - /* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */ -/* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */ - PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */ - /* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */ - PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10); - /* configuration B doesnt need dev 5,6,7 */ - /* - * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11); - * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12); - * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13); - */ - PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11); - PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb700[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb700[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb700[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb700[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb700[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb700[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb700[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb700[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb700[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb700[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb700[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb700[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/asus/m5a88-v/mptable.c b/src/mainboard/asus/m5a88-v/mptable.c index cb7aeee..c5d4597 100644 --- a/src/mainboard/asus/m5a88-v/mptable.c +++ b/src/mainboard/asus/m5a88-v/mptable.c @@ -76,64 +76,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb800, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb800, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - PCI_INT(0x0, 0x14, 0x0, 0x10); - /* HD Audio: */ - PCI_INT(0x0, 0x14, 0x2, 0x12); - - PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */ - PCI_INT(0x0, 0x12, 0x1, intr_data[0x31]); - PCI_INT(0x0, 0x13, 0x0, intr_data[0x32]); - PCI_INT(0x0, 0x13, 0x1, intr_data[0x33]); - PCI_INT(0x0, 0x16, 0x0, intr_data[0x34]); - PCI_INT(0x0, 0x16, 0x1, intr_data[0x35]); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); - - /* on board NIC & Slot PCIE. */ - /* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */ -/* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */ - PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */ - /* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */ - PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10); - /* configuration B doesnt need dev 5,6,7 */ - /* - * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11); - * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12); - * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13); - */ - PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11); - PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb800[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb800[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb800[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb800[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb800[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb800[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb800[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb800[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb800[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb800[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb800[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb800[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/avalue/eax-785e/mptable.c b/src/mainboard/avalue/eax-785e/mptable.c index 1889e02..6feabbf 100644 --- a/src/mainboard/avalue/eax-785e/mptable.c +++ b/src/mainboard/avalue/eax-785e/mptable.c @@ -77,65 +77,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb800, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb800, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - PCI_INT(0x0, 0x14, 0x0, 0x10); - /* HD Audio: */ - PCI_INT(0x0, 0x14, 0x2, 0x12); - PCI_INT(0x0, 0x14, 0x4, 0x11); - - PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */ - PCI_INT(0x0, 0x12, 0x1, intr_data[0x31]); - PCI_INT(0x0, 0x13, 0x0, intr_data[0x32]); - PCI_INT(0x0, 0x13, 0x1, intr_data[0x33]); - PCI_INT(0x0, 0x16, 0x0, intr_data[0x34]); - PCI_INT(0x0, 0x16, 0x1, intr_data[0x35]); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); - - /* on board NIC & Slot PCIE. */ - /* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */ -/* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */ - PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */ - /* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */ - PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10); - /* configuration B doesnt need dev 5,6,7 */ - /* - * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11); - * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12); - * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13); - */ - PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11); - PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb800[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb800[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb800[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb800[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb800[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb800[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb800[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb800[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb800[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb800[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb800[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb800[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/emulation/qemu-i440fx/fw_cfg.c b/src/mainboard/emulation/qemu-i440fx/fw_cfg.c index 047f211..a0ac2be 100644 --- a/src/mainboard/emulation/qemu-i440fx/fw_cfg.c +++ b/src/mainboard/emulation/qemu-i440fx/fw_cfg.c @@ -20,9 +20,7 @@ #include <smbios.h> #include <console/console.h> #include <arch/io.h> -#if CONFIG_GENERATE_ACPI_TABLES -# include <arch/acpigen.h> -#endif +#include <arch/acpigen.h>
#include "fw_cfg.h" #include "fw_cfg_if.h" @@ -123,8 +121,6 @@ int fw_cfg_max_cpus(void)
/* ---------------------------------------------------------------------- */
-#if CONFIG_GENERATE_ACPI_TABLES - /* * Starting with release 1.7 qemu provides acpi tables via fw_cfg. * Main advantage is that new (virtual) hardware which needs acpi @@ -314,8 +310,6 @@ err: return 0; }
-#endif /* CONFIG_GENERATE_ACPI_TABLES */ - /* ---------------------------------------------------------------------- */ /* pick up smbios information from fw_cfg */
diff --git a/src/mainboard/gigabyte/ma785gm/mptable.c b/src/mainboard/gigabyte/ma785gm/mptable.c index c4ec478..11426c2 100644 --- a/src/mainboard/gigabyte/ma785gm/mptable.c +++ b/src/mainboard/gigabyte/ma785gm/mptable.c @@ -97,63 +97,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb700, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb700, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* usb */ - PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */ - PCI_INT(0x0, 0x12, 0x1, 0x11); - PCI_INT(0x0, 0x13, 0x0, 0x12); - PCI_INT(0x0, 0x13, 0x1, 0x13); - PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, 0x16); - - /* HD Audio: b0:d20:f1:reg63 should be 0. */ - /* PCI_INT(0x0, 0x14, 0x2, 0x12); */ - - /* on board NIC & Slot PCIE. */ - /* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */ -/* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */ - PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */ - /* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */ - PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10); - /* configuration B doesnt need dev 5,6,7 */ - /* - * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11); - * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12); - * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13); - */ - PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11); - PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb700[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb700[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb700[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb700[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb700[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb700[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb700[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb700[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb700[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb700[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb700[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb700[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/gigabyte/ma785gmt/mptable.c b/src/mainboard/gigabyte/ma785gmt/mptable.c index c4ec478..11426c2 100644 --- a/src/mainboard/gigabyte/ma785gmt/mptable.c +++ b/src/mainboard/gigabyte/ma785gmt/mptable.c @@ -97,63 +97,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb700, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb700, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* usb */ - PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */ - PCI_INT(0x0, 0x12, 0x1, 0x11); - PCI_INT(0x0, 0x13, 0x0, 0x12); - PCI_INT(0x0, 0x13, 0x1, 0x13); - PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, 0x16); - - /* HD Audio: b0:d20:f1:reg63 should be 0. */ - /* PCI_INT(0x0, 0x14, 0x2, 0x12); */ - - /* on board NIC & Slot PCIE. */ - /* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */ -/* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */ - PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */ - /* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */ - PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10); - /* configuration B doesnt need dev 5,6,7 */ - /* - * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11); - * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12); - * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13); - */ - PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11); - PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb700[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb700[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb700[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb700[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb700[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb700[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb700[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb700[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb700[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb700[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb700[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb700[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/gigabyte/ma78gm/mptable.c b/src/mainboard/gigabyte/ma78gm/mptable.c index c4ec478..11426c2 100644 --- a/src/mainboard/gigabyte/ma78gm/mptable.c +++ b/src/mainboard/gigabyte/ma78gm/mptable.c @@ -97,63 +97,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb700, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb700, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* usb */ - PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */ - PCI_INT(0x0, 0x12, 0x1, 0x11); - PCI_INT(0x0, 0x13, 0x0, 0x12); - PCI_INT(0x0, 0x13, 0x1, 0x13); - PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, 0x16); - - /* HD Audio: b0:d20:f1:reg63 should be 0. */ - /* PCI_INT(0x0, 0x14, 0x2, 0x12); */ - - /* on board NIC & Slot PCIE. */ - /* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */ -/* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */ - PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */ - /* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */ - PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10); - /* configuration B doesnt need dev 5,6,7 */ - /* - * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11); - * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12); - * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13); - */ - PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11); - PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb700[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb700[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb700[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb700[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb700[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb700[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb700[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb700[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb700[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb700[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb700[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb700[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/gizmosphere/gizmo/mptable.c b/src/mainboard/gizmosphere/gizmo/mptable.c index 6dfd11d..cf13ba4 100755 --- a/src/mainboard/gizmosphere/gizmo/mptable.c +++ b/src/mainboard/gizmosphere/gizmo/mptable.c @@ -81,69 +81,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb800, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb800, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* APU Internal Graphic Device*/ - PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); - PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); - - //PCI_INT(0x0, 0x14, 0x1, 0x11); /* IDE. */ - PCI_INT(0x0, 0x14, 0x0, 0x10); - /* Southbridge HD Audio: */ - PCI_INT(0x0, 0x14, 0x2, 0x12); - - PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */ - PCI_INT(0x0, 0x12, 0x1, intr_data[0x31]); - PCI_INT(0x0, 0x13, 0x0, intr_data[0x32]); - PCI_INT(0x0, 0x13, 0x1, intr_data[0x33]); - PCI_INT(0x0, 0x16, 0x0, intr_data[0x34]); - PCI_INT(0x0, 0x16, 0x1, intr_data[0x35]); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); - - /* on board NIC & Slot PCIE. */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb800[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb800[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb800[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb800[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb800[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb800[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb800[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb800[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb800[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb800[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb800[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb800[1], 0x7, 0x3, 0x15); - - PCI_INT(bus_sb800[2], 0x0, 0x0, 0x12); - PCI_INT(bus_sb800[2], 0x0, 0x1, 0x13); - PCI_INT(bus_sb800[2], 0x0, 0x2, 0x14); - - /* PCIe PortA */ - PCI_INT(0x0, 0x15, 0x0, 0x10); - /* PCIe PortB */ - PCI_INT(0x0, 0x15, 0x1, 0x11); - /* PCIe PortC */ - PCI_INT(0x0, 0x15, 0x2, 0x12); - /* PCIe PortD */ - PCI_INT(0x0, 0x15, 0x3, 0x13); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/iei/kino-780am2-fam10/mptable.c b/src/mainboard/iei/kino-780am2-fam10/mptable.c index 64274de..11426c2 100644 --- a/src/mainboard/iei/kino-780am2-fam10/mptable.c +++ b/src/mainboard/iei/kino-780am2-fam10/mptable.c @@ -97,88 +97,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb700, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb700, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* changes added to match acpi tables */ - PCI_INT(0x0, 0x02, 0x0, 0x12); - PCI_INT(0x0, 0x03, 0x0, 0x13); - PCI_INT(0x0, 0x04, 0x0, 0x10); - PCI_INT(0x0, 0x09, 0x0, 0x11); - PCI_INT(0x0, 0x0A, 0x0, 0x12); - PCI_INT(0x0, 0x12, 0x2, 0x12); - PCI_INT(0x0, 0x12, 0x3, 0x13); - PCI_INT(0x0, 0x13, 0x2, 0x10); - PCI_INT(0x0, 0x13, 0x2, 0x11); - PCI_INT(0x0, 0x14, 0x1, 0x11); - PCI_INT(0x0, 0x14, 0x3, 0x13); - PCI_INT(0x1, 0x05, 0x2, 0x10); - PCI_INT(0x1, 0x05, 0x3, 0x11); - PCI_INT(0x2, 0x00, 0x0, 0x12); - PCI_INT(0x2, 0x00, 0x1, 0x13); - PCI_INT(0x2, 0x00, 0x2, 0x10); - PCI_INT(0x2, 0x00, 0x3, 0x11); - - /* RS780 PCI to PCI bridge (PCIE port 4) */ - PCI_INT(0x0, 0x09, 0x0, 0x11); - - /* usb */ - PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */ - PCI_INT(0x0, 0x12, 0x1, 0x11); - PCI_INT(0x0, 0x13, 0x0, 0x12); - PCI_INT(0x0, 0x13, 0x1, 0x13); - PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, 0x16); - - /* HD Audio: b0:d20:f1:reg63 should be 0. */ - PCI_INT(0x0, 0x14, 0x2, 0x12); - - /* on board NIC & Slot PCIE. */ - /* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */ - /* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */ - PCI_INT(0x1, 0x5, 0x0, 0x12); /* VGA */ - PCI_INT(0x1, 0x5, 0x1, 0x13); /* Audio */ - /* PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); */ /* Dev 2, external GFX */ - /* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */ - /* PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10); */ - /* configuration B doesnt need dev 5,6,7 */ - /* - * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11); - * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12); - * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13); - */ - /* PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11); */ - PCI_INT(0x3, 0x0, 0x0, 0x11); /* NIC */ - /* PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); NIC */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb700[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb700[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb700[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb700[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb700[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb700[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb700[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb700[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb700[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb700[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb700[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb700[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/jetway/pa78vm5/mptable.c b/src/mainboard/jetway/pa78vm5/mptable.c index 949501b..7cabdf1 100644 --- a/src/mainboard/jetway/pa78vm5/mptable.c +++ b/src/mainboard/jetway/pa78vm5/mptable.c @@ -98,63 +98,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb700, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb700, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* usb */ - PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */ - PCI_INT(0x0, 0x12, 0x1, 0x11); - PCI_INT(0x0, 0x13, 0x0, 0x12); - PCI_INT(0x0, 0x13, 0x1, 0x13); - PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, 0x16); - - /* HD Audio: b0:d20:f1:reg63 should be 0. */ - /* PCI_INT(0x0, 0x14, 0x2, 0x12); */ - - /* on board NIC & Slot PCIE. */ - /* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */ -/* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */ - PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */ - /* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */ - PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10); - /* configuration B doesnt need dev 5,6,7 */ - /* - * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11); - * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12); - * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13); - */ - PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11); - PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb700[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb700[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb700[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb700[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb700[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb700[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb700[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb700[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb700[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb700[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb700[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb700[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/kontron/kt690/mptable.c b/src/mainboard/kontron/kt690/mptable.c index 6a94479..8b86b02 100644 --- a/src/mainboard/kontron/kt690/mptable.c +++ b/src/mainboard/kontron/kt690/mptable.c @@ -96,57 +96,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb600, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb600, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* usb */ - PCI_INT(0x0, 0x13, 0x0, 0x10); - PCI_INT(0x0, 0x13, 0x1, 0x11); - PCI_INT(0x0, 0x13, 0x2, 0x12); - PCI_INT(0x0, 0x13, 0x3, 0x13); - - /* sata */ - PCI_INT(0x0, 0x12, 0x0, 0x16); - - /* HD Audio: b0:d20:f1:reg63 should be 0. */ - PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* on board NIC & Slot PCIE. */ - PCI_INT(bus_rs690[1], 0x5, 0x0, 0x12); - PCI_INT(bus_rs690[1], 0x5, 0x1, 0x13); - PCI_INT(bus_rs690[2], 0x0, 0x0, 0x12); - PCI_INT(bus_rs690[3], 0x0, 0x0, 0x13); - PCI_INT(bus_rs690[4], 0x0, 0x0, 0x10); - PCI_INT(bus_rs690[5], 0x0, 0x0, 0x11); - PCI_INT(bus_rs690[6], 0x0, 0x0, 0x12); - PCI_INT(bus_rs690[7], 0x0, 0x0, 0x13); - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb600[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb600[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb600[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb600[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb600[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb600[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb600[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb600[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb600[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb600[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb600[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb600[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/lippert/frontrunner-af/mptable.c b/src/mainboard/lippert/frontrunner-af/mptable.c index 6b8aaa6..c115bda 100644 --- a/src/mainboard/lippert/frontrunner-af/mptable.c +++ b/src/mainboard/lippert/frontrunner-af/mptable.c @@ -80,69 +80,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb800, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb800, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* APU Internal Graphic Device*/ - PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); - PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); - - //PCI_INT(0x0, 0x14, 0x1, 0x11); /* IDE. */ - PCI_INT(0x0, 0x14, 0x0, 0x10); - /* Southbridge HD Audio: */ - PCI_INT(0x0, 0x14, 0x2, 0x12); - - PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */ - PCI_INT(0x0, 0x12, 0x1, intr_data[0x31]); - PCI_INT(0x0, 0x13, 0x0, intr_data[0x32]); - PCI_INT(0x0, 0x13, 0x1, intr_data[0x33]); - PCI_INT(0x0, 0x16, 0x0, intr_data[0x34]); - PCI_INT(0x0, 0x16, 0x1, intr_data[0x35]); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); - - /* on board NIC & Slot PCIE. */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb800[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb800[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb800[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb800[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb800[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb800[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb800[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb800[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb800[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb800[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb800[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb800[1], 0x7, 0x3, 0x15); - - PCI_INT(bus_sb800[2], 0x0, 0x0, 0x12); - PCI_INT(bus_sb800[2], 0x0, 0x1, 0x13); - PCI_INT(bus_sb800[2], 0x0, 0x2, 0x14); - - /* PCIe PortA */ - PCI_INT(0x0, 0x15, 0x0, 0x10); - /* PCIe PortB */ - PCI_INT(0x0, 0x15, 0x1, 0x11); - /* PCIe PortC */ - PCI_INT(0x0, 0x15, 0x2, 0x12); - /* PCIe PortD */ - PCI_INT(0x0, 0x15, 0x3, 0x13); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/lippert/toucan-af/mptable.c b/src/mainboard/lippert/toucan-af/mptable.c index 6b8aaa6..c115bda 100644 --- a/src/mainboard/lippert/toucan-af/mptable.c +++ b/src/mainboard/lippert/toucan-af/mptable.c @@ -80,69 +80,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb800, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb800, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* APU Internal Graphic Device*/ - PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); - PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); - - //PCI_INT(0x0, 0x14, 0x1, 0x11); /* IDE. */ - PCI_INT(0x0, 0x14, 0x0, 0x10); - /* Southbridge HD Audio: */ - PCI_INT(0x0, 0x14, 0x2, 0x12); - - PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */ - PCI_INT(0x0, 0x12, 0x1, intr_data[0x31]); - PCI_INT(0x0, 0x13, 0x0, intr_data[0x32]); - PCI_INT(0x0, 0x13, 0x1, intr_data[0x33]); - PCI_INT(0x0, 0x16, 0x0, intr_data[0x34]); - PCI_INT(0x0, 0x16, 0x1, intr_data[0x35]); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); - - /* on board NIC & Slot PCIE. */ - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb800[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb800[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb800[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb800[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb800[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb800[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb800[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb800[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb800[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb800[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb800[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb800[1], 0x7, 0x3, 0x15); - - PCI_INT(bus_sb800[2], 0x0, 0x0, 0x12); - PCI_INT(bus_sb800[2], 0x0, 0x1, 0x13); - PCI_INT(bus_sb800[2], 0x0, 0x2, 0x14); - - /* PCIe PortA */ - PCI_INT(0x0, 0x15, 0x0, 0x10); - /* PCIe PortB */ - PCI_INT(0x0, 0x15, 0x1, 0x11); - /* PCIe PortC */ - PCI_INT(0x0, 0x15, 0x2, 0x12); - /* PCIe PortD */ - PCI_INT(0x0, 0x15, 0x3, 0x13); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/roda/rk9/mainboard.c b/src/mainboard/roda/rk9/mainboard.c index 33e6bde..3eec2b9 100644 --- a/src/mainboard/roda/rk9/mainboard.c +++ b/src/mainboard/roda/rk9/mainboard.c @@ -31,10 +31,8 @@ #include <ec/acpi/ec.h> #include "hda_verb.h"
-#if CONFIG_GENERATE_ACPI_TABLES #include "cstates.c" /* Include it, as the linker won't find the overloaded weak function in there. */ -#endif
#if CONFIG_VGA_ROM_RUN diff --git a/src/mainboard/supermicro/h8scm_fam10/mptable.c b/src/mainboard/supermicro/h8scm_fam10/mptable.c index 01a6980..84593fc 100644 --- a/src/mainboard/supermicro/h8scm_fam10/mptable.c +++ b/src/mainboard/supermicro/h8scm_fam10/mptable.c @@ -107,28 +107,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sp5100, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sp5100, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - /* usb */ - PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */ - PCI_INT(0x0, 0x12, 0x1, 0x11); - PCI_INT(0x0, 0x13, 0x0, 0x12); - PCI_INT(0x0, 0x13, 0x1, 0x13); - //PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* sata */ - PCI_INT(0x0, 0x11, 0x0, 0x16); - - /* HD Audio: b0:d20:f1:reg63 should be 0. */ - PCI_INT(0x0, 0x14, 0x2, 0x10); - /* on board NIC & Slot PCIE. */ /* configuration B doesnt need dev 5,6,7 */ /* @@ -149,25 +127,6 @@ static void *smp_write_config_table(void *v) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_sr5650[12], (((0)<<2)|(0)), apicid_sp5100+1, 12); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_sr5650[12], (((0)<<2)|(1)), apicid_sp5100+1, 13); /* card behind dev12 */
- /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sp5100[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sp5100[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sp5100[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sp5100[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sp5100[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sp5100[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sp5100[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sp5100[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sp5100[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sp5100[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sp5100[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sp5100[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/technexion/tim5690/mptable.c b/src/mainboard/technexion/tim5690/mptable.c index 6a94479..8b86b02 100644 --- a/src/mainboard/technexion/tim5690/mptable.c +++ b/src/mainboard/technexion/tim5690/mptable.c @@ -96,57 +96,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb600, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb600, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* usb */ - PCI_INT(0x0, 0x13, 0x0, 0x10); - PCI_INT(0x0, 0x13, 0x1, 0x11); - PCI_INT(0x0, 0x13, 0x2, 0x12); - PCI_INT(0x0, 0x13, 0x3, 0x13); - - /* sata */ - PCI_INT(0x0, 0x12, 0x0, 0x16); - - /* HD Audio: b0:d20:f1:reg63 should be 0. */ - PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* on board NIC & Slot PCIE. */ - PCI_INT(bus_rs690[1], 0x5, 0x0, 0x12); - PCI_INT(bus_rs690[1], 0x5, 0x1, 0x13); - PCI_INT(bus_rs690[2], 0x0, 0x0, 0x12); - PCI_INT(bus_rs690[3], 0x0, 0x0, 0x13); - PCI_INT(bus_rs690[4], 0x0, 0x0, 0x10); - PCI_INT(bus_rs690[5], 0x0, 0x0, 0x11); - PCI_INT(bus_rs690[6], 0x0, 0x0, 0x12); - PCI_INT(bus_rs690[7], 0x0, 0x0, 0x13); - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb600[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb600[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb600[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb600[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb600[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb600[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb600[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb600[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb600[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb600[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb600[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb600[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/mainboard/technexion/tim8690/mptable.c b/src/mainboard/technexion/tim8690/mptable.c index 6a94479..8b86b02 100644 --- a/src/mainboard/technexion/tim8690/mptable.c +++ b/src/mainboard/technexion/tim8690/mptable.c @@ -96,57 +96,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb600, 0);
- /* PCI interrupts are level triggered, and are - * associated with a specific bus/device/function tuple. - */ -#if !CONFIG_GENERATE_ACPI_TABLES -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb600, (pin)) -#else -#define PCI_INT(bus, dev, fn, pin) -#endif - - /* usb */ - PCI_INT(0x0, 0x13, 0x0, 0x10); - PCI_INT(0x0, 0x13, 0x1, 0x11); - PCI_INT(0x0, 0x13, 0x2, 0x12); - PCI_INT(0x0, 0x13, 0x3, 0x13); - - /* sata */ - PCI_INT(0x0, 0x12, 0x0, 0x16); - - /* HD Audio: b0:d20:f1:reg63 should be 0. */ - PCI_INT(0x0, 0x14, 0x0, 0x10); - - /* on board NIC & Slot PCIE. */ - PCI_INT(bus_rs690[1], 0x5, 0x0, 0x12); - PCI_INT(bus_rs690[1], 0x5, 0x1, 0x13); - PCI_INT(bus_rs690[2], 0x0, 0x0, 0x12); - PCI_INT(bus_rs690[3], 0x0, 0x0, 0x13); - PCI_INT(bus_rs690[4], 0x0, 0x0, 0x10); - PCI_INT(bus_rs690[5], 0x0, 0x0, 0x11); - PCI_INT(bus_rs690[6], 0x0, 0x0, 0x12); - PCI_INT(bus_rs690[7], 0x0, 0x0, 0x13); - - /* PCI slots */ - /* PCI_SLOT 0. */ - PCI_INT(bus_sb600[1], 0x5, 0x0, 0x14); - PCI_INT(bus_sb600[1], 0x5, 0x1, 0x15); - PCI_INT(bus_sb600[1], 0x5, 0x2, 0x16); - PCI_INT(bus_sb600[1], 0x5, 0x3, 0x17); - - /* PCI_SLOT 1. */ - PCI_INT(bus_sb600[1], 0x6, 0x0, 0x15); - PCI_INT(bus_sb600[1], 0x6, 0x1, 0x16); - PCI_INT(bus_sb600[1], 0x6, 0x2, 0x17); - PCI_INT(bus_sb600[1], 0x6, 0x3, 0x14); - - /* PCI_SLOT 2. */ - PCI_INT(bus_sb600[1], 0x7, 0x0, 0x16); - PCI_INT(bus_sb600[1], 0x7, 0x1, 0x17); - PCI_INT(bus_sb600[1], 0x7, 0x2, 0x14); - PCI_INT(bus_sb600[1], 0x7, 0x3, 0x15); - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); diff --git a/src/northbridge/amd/agesa/family10/Makefile.inc b/src/northbridge/amd/agesa/family10/Makefile.inc index 9676d54..a10a4a1 100644 --- a/src/northbridge/amd/agesa/family10/Makefile.inc +++ b/src/northbridge/amd/agesa/family10/Makefile.inc @@ -19,4 +19,4 @@
ramstage-y += northbridge.c
-ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += ssdt.asl +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += ssdt.asl diff --git a/src/northbridge/amd/agesa/family12/Makefile.inc b/src/northbridge/amd/agesa/family12/Makefile.inc index 9676d54..a10a4a1 100644 --- a/src/northbridge/amd/agesa/family12/Makefile.inc +++ b/src/northbridge/amd/agesa/family12/Makefile.inc @@ -19,4 +19,4 @@
ramstage-y += northbridge.c
-ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += ssdt.asl +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += ssdt.asl diff --git a/src/northbridge/amd/amdfam10/Makefile.inc b/src/northbridge/amd/amdfam10/Makefile.inc index a24783b..bae7c18 100644 --- a/src/northbridge/amd/amdfam10/Makefile.inc +++ b/src/northbridge/amd/amdfam10/Makefile.inc @@ -1,13 +1,13 @@ ramstage-y += northbridge.c ramstage-y += misc_control.c
-ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += ssdt.asl -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += sspr1.asl -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += sspr2.asl -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += sspr3.asl -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += sspr4.asl -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += sspr5.asl +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += ssdt.asl +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += sspr1.asl +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += sspr2.asl +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += sspr3.asl +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += sspr4.asl +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += sspr5.asl
ramstage-y += get_pci1234.c
diff --git a/src/northbridge/amd/amdk8/Makefile.inc b/src/northbridge/amd/amdk8/Makefile.inc index 38b0201..eeef9e8 100644 --- a/src/northbridge/amd/amdk8/Makefile.inc +++ b/src/northbridge/amd/amdk8/Makefile.inc @@ -1,7 +1,7 @@ ramstage-y += northbridge.c ramstage-y += misc_control.c ramstage-y += get_sblk_pci1234.c -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
# Enable this if you want to check the values of the PCI routing registers. # Call show_all_routes() anywhere amdk8.h is included. diff --git a/src/northbridge/intel/fsp_sandybridge/Makefile.inc b/src/northbridge/intel/fsp_sandybridge/Makefile.inc index 5bc3d58..b8045a6 100644 --- a/src/northbridge/intel/fsp_sandybridge/Makefile.inc +++ b/src/northbridge/intel/fsp_sandybridge/Makefile.inc @@ -21,7 +21,7 @@ ramstage-y += northbridge.c ramstage-y += gma.c
-ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c +ramstage-y += acpi.c ramstage-y += fsp_util.c ramstage-$(CONFIG_ENABLE_FAST_BOOT) += mrccache.c
diff --git a/src/northbridge/intel/gm45/Makefile.inc b/src/northbridge/intel/gm45/Makefile.inc index 01cf855..715eb75 100644 --- a/src/northbridge/intel/gm45/Makefile.inc +++ b/src/northbridge/intel/gm45/Makefile.inc @@ -31,7 +31,7 @@ romstage-y += pm.c romstage-y += ram_calc.c romstage-$(CONFIG_IOMMU) += iommu.c
-ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c +ramstage-y += acpi.c
ramstage-y += ram_calc.c ramstage-y += northbridge.c diff --git a/src/northbridge/intel/haswell/Makefile.inc b/src/northbridge/intel/haswell/Makefile.inc index bf7daa7..3721755 100644 --- a/src/northbridge/intel/haswell/Makefile.inc +++ b/src/northbridge/intel/haswell/Makefile.inc @@ -21,7 +21,7 @@ ramstage-y += ram_calc.c ramstage-y += northbridge.c ramstage-y += gma.c
-ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c +ramstage-y += acpi.c ramstage-y += mrccache.c ramstage-y += minihd.c
diff --git a/src/northbridge/intel/i945/Makefile.inc b/src/northbridge/intel/i945/Makefile.inc index 67643eb..d3a795c 100644 --- a/src/northbridge/intel/i945/Makefile.inc +++ b/src/northbridge/intel/i945/Makefile.inc @@ -20,7 +20,7 @@ ramstage-y += ram_calc.c ramstage-y += northbridge.c ramstage-y += gma.c -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c +ramstage-y += acpi.c
romstage-y += ram_calc.c romstage-y += raminit.c diff --git a/src/northbridge/intel/nehalem/Makefile.inc b/src/northbridge/intel/nehalem/Makefile.inc index 0115501..b75fd2d 100644 --- a/src/northbridge/intel/nehalem/Makefile.inc +++ b/src/northbridge/intel/nehalem/Makefile.inc @@ -20,7 +20,7 @@ ramstage-y += northbridge.c ramstage-y += gma.c
-ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c +ramstage-y += acpi.c ramstage-y += ../sandybridge/mrccache.c
romstage-y += raminit.c diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index cef52b2..d27eade 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -21,7 +21,7 @@ ramstage-y += ram_calc.c ramstage-y += northbridge.c ramstage-y += gma.c
-ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c +ramstage-y += acpi.c ramstage-y += mrccache.c
romstage-y += ram_calc.c diff --git a/src/northbridge/intel/sch/Makefile.inc b/src/northbridge/intel/sch/Makefile.inc index 6124a8c..16152b7 100644 --- a/src/northbridge/intel/sch/Makefile.inc +++ b/src/northbridge/intel/sch/Makefile.inc @@ -20,4 +20,4 @@ ramstage-y += northbridge.c ramstage-y += gma.c ramstage-y += port_access.c -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c +ramstage-y += acpi.c diff --git a/src/northbridge/intel/sch/acpi.c b/src/northbridge/intel/sch/acpi.c index 6dd495f..25cf7ba 100644 --- a/src/northbridge/intel/sch/acpi.c +++ b/src/northbridge/intel/sch/acpi.c @@ -66,9 +66,7 @@ unsigned long acpi_fill_mcfg(unsigned long current) if (!pciexbar) return current;
-#if CONFIG_GENERATE_ACPI_TABLES current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *) current, pciexbar, 0x0, 0x0, max_buses - 1); -#endif return current; } diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc index 54a93d2..707e134 100644 --- a/src/southbridge/amd/agesa/hudson/Makefile.inc +++ b/src/southbridge/amd/agesa/hudson/Makefile.inc @@ -10,7 +10,7 @@ ramstage-y += pci.c ramstage-y += pcie.c ramstage-y += sd.c
-ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c ramstage-y += reset.c romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c diff --git a/src/southbridge/amd/amd8111/acpi.c b/src/southbridge/amd/amd8111/acpi.c index b734846..fda6924 100644 --- a/src/southbridge/amd/amd8111/acpi.c +++ b/src/southbridge/amd/amd8111/acpi.c @@ -89,7 +89,7 @@ static int lsmbus_block_write(device_t dev, uint8_t cmd, u8 bytes, const u8 *buf }
-#if CONFIG_GENERATE_ACPI_TABLES +#if CONFIG_HAVE_ACPI_TABLES unsigned pm_base; #endif
@@ -162,7 +162,7 @@ static void acpi_init(struct device *dev) (on*12)+(on>>1),(on&1)*5); }
-#if CONFIG_GENERATE_ACPI_TABLES +#if CONFIG_HAVE_ACPI_TABLES pm_base = pci_read_config16(dev, 0x58) & 0xff00; printk(BIOS_DEBUG, "pm_base: 0x%04x\n",pm_base); #endif diff --git a/src/southbridge/amd/cimx/sb800/Makefile.inc b/src/southbridge/amd/cimx/sb800/Makefile.inc index 2ed5096..82ca998 100644 --- a/src/southbridge/amd/cimx/sb800/Makefile.inc +++ b/src/southbridge/amd/cimx/sb800/Makefile.inc @@ -32,7 +32,7 @@ ramstage-y += reset.c ramstage-$(CONFIG_SB800_MANUAL_FAN_CONTROL) += fan.c ramstage-$(CONFIG_SB800_IMC_FAN_CONTROL) += fan.c ramstage-$(CONFIG_HAVE_ACPI_RESUME) += spi.c -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ../../sb800/enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += ../../sb800/enable_usbdebug.c diff --git a/src/southbridge/amd/sb700/Makefile.inc b/src/southbridge/amd/sb700/Makefile.inc index 677aaad..6e772fe 100644 --- a/src/southbridge/amd/sb700/Makefile.inc +++ b/src/southbridge/amd/sb700/Makefile.inc @@ -7,7 +7,7 @@ ramstage-y += ide.c ramstage-y += sata.c ramstage-y += hda.c ramstage-y += pci.c -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c romstage-y += reset.c ramstage-y += reset.c romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c diff --git a/src/southbridge/amd/sb800/Makefile.inc b/src/southbridge/amd/sb800/Makefile.inc index db75d3f..d665af4 100644 --- a/src/southbridge/amd/sb800/Makefile.inc +++ b/src/southbridge/amd/sb800/Makefile.inc @@ -7,7 +7,7 @@ ramstage-y += sata.c ramstage-y += hda.c ramstage-y += pci.c ramstage-y += pcie.c -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c ramstage-y += reset.c romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c diff --git a/src/southbridge/intel/i82371eb/Makefile.inc b/src/southbridge/intel/i82371eb/Makefile.inc index 179ff8f..0aae455 100644 --- a/src/southbridge/intel/i82371eb/Makefile.inc +++ b/src/southbridge/intel/i82371eb/Makefile.inc @@ -24,8 +24,8 @@ ramstage-y += ide.c ramstage-y += usb.c ramstage-y += smbus.c ramstage-y += reset.c -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi_tables.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.c ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.c
romstage-y += early_pm.c diff --git a/src/southbridge/nvidia/ck804/Makefile.inc b/src/southbridge/nvidia/ck804/Makefile.inc index b249f7e..db062f5 100644 --- a/src/southbridge/nvidia/ck804/Makefile.inc +++ b/src/southbridge/nvidia/ck804/Makefile.inc @@ -13,7 +13,7 @@ ramstage-y += ht.c
ramstage-y += reset.c
-ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c diff --git a/src/southbridge/nvidia/mcp55/Makefile.inc b/src/southbridge/nvidia/mcp55/Makefile.inc index 29ad438..03a34eb 100644 --- a/src/southbridge/nvidia/mcp55/Makefile.inc +++ b/src/southbridge/nvidia/mcp55/Makefile.inc @@ -11,7 +11,7 @@ ramstage-y += smbus.c ramstage-y += usb2.c ramstage-y += usb.c
-ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
ramstage-y += reset.c
diff --git a/src/southbridge/nvidia/mcp55/smbus.c b/src/southbridge/nvidia/mcp55/smbus.c index 3b3f86a..c5081a4 100644 --- a/src/southbridge/nvidia/mcp55/smbus.c +++ b/src/southbridge/nvidia/mcp55/smbus.c @@ -93,7 +93,7 @@ static struct smbus_bus_operations lops_smbus_bus = { .write_byte = lsmbus_write_byte, };
-#if CONFIG_GENERATE_ACPI_TABLES +#if CONFIG_HAVE_ACPI_TABLES unsigned pm_base; #endif
@@ -112,7 +112,7 @@ static void mcp55_sm_read_resources(device_t dev)
static void mcp55_sm_init(device_t dev) { -#if CONFIG_GENERATE_ACPI_TABLES +#if CONFIG_HAVE_ACPI_TABLES struct resource *res;
res = find_resource(dev, 0x60); diff --git a/src/southbridge/via/vt8237r/Makefile.inc b/src/southbridge/via/vt8237r/Makefile.inc index 71404d2..de69ffd 100644 --- a/src/southbridge/via/vt8237r/Makefile.inc +++ b/src/southbridge/via/vt8237r/Makefile.inc @@ -24,6 +24,6 @@ ramstage-y += lpc.c ramstage-y += sata.c ramstage-y += usb.c ramstage-$(CONFIG_PIRQ_ROUTE) += pirq.c -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c