[coreboot-gerrit] Patch merged into coreboot/master: arm64: mmu: Make page table manipulation work across stages

the following patch was just integrated into master:
commit fe4cbf1167fcb27ec332a2efe16297705ca07359
Author: Julius Werner 
Date:   Wed Oct 7 18:38:24 2015 -0700

arm64: mmu: Make page table manipulation work across stages

In order to have a proper runtime-modifyable page table API (e.g. to
    remap DRAM after it was intialized), we need to remove any external
    bookkeeping kept in global variables (which do not persist across
    stages) from the MMU code. This patch implements this in a similar way
    as it has recently been done for ARM32 (marking free table slots with a
    special sentinel value in the first PTE that cannot occur as part of a
    normal page table).

Since this requires the page table buffer to be known at compile-time,
    we have to remove the option of passing it to mmu_init() at runtime
    (which I already kinda deprecated before). The existing Tegra chipsets
    that still used it are switched to instead define it in memlayout in a
    minimally invasive change. This might not be the best way to design this
    overall (I think we should probably just throw the tables into SRAM like
    on all other platforms), but I don't have a Tegra system to test so I'd
    rather keep this change low impact and leave the major redesign for
    later.

Also inlined some single-use one-liner functions in mmu.c that I felt
    confused things more than they cleared up, and fixed an (apparently
    harmless?) issue with forgetting to mask out the XN page attribute bit
    when casting a table descriptor to a pointer.

BRANCH=None
    BUG=None
    TEST=Compiled Ryu and Smaug. Booted Oak.

Change-Id: Iad71f97f5ec4b1fc981dbc8ff1dc88d96c8ee55a
    Signed-off-by: Julius Werner 
    Reviewed-on: http://review.coreboot.org/12075
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin

See http://review.coreboot.org/12075 for details.

-gerrit