[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: add processor power limits control support

[Sumeet R Pawnikar (Code Review)]

Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39346 )

Change subject: soc/intel/common: add processor power limits control support
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Patch Set 25:

(2 comments)
> Patch Set 25:
>
> Would you mind stacking these all in one single chain? Whenever I go visit a specific SoC-change on top of this, it seems they all have the same parent, which is this one.

I have created this intentionally because I did not find any dependencies between these SoC-changes with each other, for an example there is no dependencies between tigerlake patch and skylake patch. 
Also, I though if all these in one single chain, that would create unnecessary dependencies between SoC-chagnes and if one breaks in Jenkin build, all other fails considering dependencies between them. So, keeping independent this approach reduces Jenkin build failures as well. 
Keeping them as independent would help to track, review, portability and easy to cherry pick for product specific firmware branches. 
Please, correct if this way of independent implemention is improper or suggest any other better approach. Thanks.

https://review.coreboot.org/c/coreboot/+/39346/22/src/soc/intel/cannonlake/f... 
File src/soc/intel/cannonlake/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/39346/22/src/soc/intel/cannonlake/f... 
PS22, Line 157: 	struct soc_power_limits_config *soc_confg;
> Ack

Done

https://review.coreboot.org/c/coreboot/+/39346/22/src/soc/intel/common/acpi/... 
File src/soc/intel/common/acpi/dptf.asl:

PS22:
> This is required to add TCPU zone for thermal control.

Done