Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42152 )
Change subject: sb/intel/bd82x6x: Use PCI bitwise ops ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/42152/4/src/southbridge/intel/bd82x... File src/southbridge/intel/bd82x6x/pcie.c:
https://review.coreboot.org/c/coreboot/+/42152/4/src/southbridge/intel/bd82x... PS4, Line 251: /* FIXME: That ASSERT() macro contains the line number... Add padding so that it's the same */ I'm fine with this, just put immediate followup to remove.
https://review.coreboot.org/c/coreboot/+/42152/4/src/southbridge/intel/bd82x... File src/southbridge/intel/bd82x6x/smihandler.c:
https://review.coreboot.org/c/coreboot/+/42152/4/src/southbridge/intel/bd82x... PS4, Line 112: if ((xhci_bar + 0x4C0) & 1) I dont get this.. CB:2759
(*((u8 *)xhci_bar + 0x4c0) & 1)