Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38988 )
Change subject: mainboard: Add new Ivy Bridge board ASUS P8Z77-M ......................................................................
Patch Set 10:
(4 comments)
https://review.coreboot.org/c/coreboot/+/38988/10/src/mainboard/asus/p8z77-m... File src/mainboard/asus/p8z77-m/Kconfig:
https://review.coreboot.org/c/coreboot/+/38988/10/src/mainboard/asus/p8z77-m... PS10, Line 7: select BOARD_ROMSIZE_KB_8192
nit: sort these alphabetically?
Is same structure for all P8Z77 boards. Gotta sort'em all?
https://review.coreboot.org/c/coreboot/+/38988/6/src/mainboard/asus/p8z77-m/... File src/mainboard/asus/p8z77-m/early_init.c:
https://review.coreboot.org/c/coreboot/+/38988/6/src/mainboard/asus/p8z77-m/... PS6, Line 34: { 1, 2, 4 }, /* Port 9: USB2 internal header USB910, bottom */
Sorry, I meant the "Port X" at the beginning of the comments: […]
Done
https://review.coreboot.org/c/coreboot/+/38988/10/src/mainboard/asus/p8z77-m... File src/mainboard/asus/p8z77-m/early_init.c:
https://review.coreboot.org/c/coreboot/+/38988/10/src/mainboard/asus/p8z77-m... PS10, Line 108: for (i = 0; i < max; i += 2)
Why not do it like the Asus P8Z77-V LX2 does it?
Bootblock code space efficiency. Z77-V uses a string of pnp_write_config() which takes 8 bytes for each board-specific SIO writes, LDN changes included; my setup takes 32 bytes plus 2 bytes per write. Z77-M has 31 such writes including serial port enable, this setup would take 94 bytes versus 248 bytes if it does it like Z77-V. nuvoton_enable_serial() gets optimized away because it's not used, saving another 105 bytes. If I convert, the same setup would take 239 more bytes.
Direct pnp_write_config() calls are more concise, if the board needs 5 such config writes or less.
I plan to attempt to use a cut down Linux kernel as payload, so again every byte counts. On that note, I am going to see if there's any chance to cut sandy/ivy CPU bootblock size to 32KiB, since I saw that bootblock code for all 3 P8Z77 boards weigh in at a little over 16KiB, console included. We could save more with LTO.
https://review.coreboot.org/c/coreboot/+/38988/10/src/mainboard/asus/p8z77-m... PS10, Line 158: .pei_version = PEI_VERSION, : .mchbar = (uintptr_t)DEFAULT_MCHBAR, : .dmibar = (uintptr_t)DEFAULT_DMIBAR, : .epbar = DEFAULT_EPBAR, : .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, : .smbusbar = SMBUS_IO_BASE, : .wdbbar = 0x4000000, : .wdbsize = 0x1000, : .hpet_address = CONFIG_HPET_ADDRESS, : .rcba = (uintptr_t)DEFAULT_RCBABASE, : .pmbase = DEFAULT_PMBASE, : .gpiobase = DEFAULT_GPIOBASE, : .thermalbase = 0xfed08000,
Half of these are already set on the `pei_data` struct pointer parameter. […]
Thanks for the tip. Will be done in next patch set.