[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/apollolake: Reset GPI IS & IE registers at ramstage

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32534 )

Change subject: soc/intel/apollolake: Reset GPI IS & IE registers at ramstage
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Patch Set 1:

(1 comment)

https://review.coreboot.org/#/c/32534/1/src/soc/intel/apollolake/chip.c 
File src/soc/intel/apollolake/chip.c:

https://review.coreboot.org/#/c/32534/1/src/soc/intel/apollolake/chip.c@406 
PS1, Line 406: gpi_clear_int_cfg
Can we do this before calling into fsp_silicon_init? Mainboard GPIO configuration is done before silicon init. So, it would be good to clear interrupt status and enable bits before that.