[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Check sizes of CSE CBFS RW blob and CSE RW BP

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48423 )

Change subject: soc/intel/common: Check sizes of CSE CBFS RW blob and CSE RW BP
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/48423/1/src/soc/intel/common/block/... 
File src/soc/intel/common/block/cse/cse_lite.c:

https://review.coreboot.org/c/coreboot/+/48423/1/src/soc/intel/common/block/... 
PS1, Line 680: region_device_sz(target_rdev) != cse_blob_sz
I don't think this check is correct. We need to ensure that the target_rdev size is greater than the size of blob being written. We cannot expect them to be the same always. Think of the scenarios where we start with larger RW size on flash where some part is left unused and blobs that are written to that region can be smaller.