Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36550 )
Change subject: soc/intel/tigerlake/bootblock: Do initial SoC commit till bootblock ......................................................................
Patch Set 7:
(4 comments)
https://review.coreboot.org/c/coreboot/+/36550/7/src/soc/intel/tigerlake/boo... File src/soc/intel/tigerlake/bootblock/bootblock.c:
https://review.coreboot.org/c/coreboot/+/36550/7/src/soc/intel/tigerlake/boo... PS7, Line 42: report_platform_info();
SGTM.
Done
https://review.coreboot.org/c/coreboot/+/36550/1/src/soc/intel/tigerlake/boo... File src/soc/intel/tigerlake/bootblock/pch.c:
https://review.coreboot.org/c/coreboot/+/36550/1/src/soc/intel/tigerlake/boo... PS1, Line 104: soc_config_acpibase
Yes, ACPI base is required to access GPE STS registers which are used in verstage.
Done
https://review.coreboot.org/c/coreboot/+/36550/1/src/soc/intel/tigerlake/boo... PS1, Line 178: /* Set up GPE configuration */ : pmc_gpe_init();
There is verstage code that relies on GPE being available and hence is is necessary to perform GPE i […]
Done
https://review.coreboot.org/c/coreboot/+/36550/6/src/soc/intel/tigerlake/boo... File src/soc/intel/tigerlake/bootblock/pch.c:
https://review.coreboot.org/c/coreboot/+/36550/6/src/soc/intel/tigerlake/boo... PS6, Line 110: uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 |
i guess we are not using it, good to enable if required going forward ?
Done