[coreboot-gerrit] Change in coreboot[master]: nb/intel/x4x/raminit: Add DDR3 specific dra/drb settings

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/22996

Change subject: nb/intel/x4x/raminit: Add DDR3 specific dra/drb settings
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nb/intel/x4x/raminit: Add DDR3 specific dra/drb settings

Change-Id: I11a79f6800dbfe19c2bd33c0d6caca14b034e384
Signed-off-by: Arthur Heymans 
---
M src/northbridge/intel/x4x/raminit_ddr23.c
1 file changed, 8 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/22996/1

diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c
index 13b98ee..8110a1e 100644
--- a/src/northbridge/intel/x4x/raminit_ddr23.c
+++ b/src/northbridge/intel/x4x/raminit_ddr23.c
@@ -1618,6 +1618,14 @@
    MCHBAR8(0x262) = (MCHBAR8(0x262) & ~0xf0) | ((rankpop0 << 4) & 0xf0);
    MCHBAR8(0x662) = (MCHBAR8(0x662) & ~0xf0) | ((rankpop1 << 4) & 0xf0);

+	if (s->spd_type == DDR3) {
+		FOR_EACH_POPULATED_CHANNEL(s->dimms, ch) {
+			/* ZQCAL enable */
+			MCHBAR32(0x269 + 0x400 * ch) =
+				MCHBAR32(0x269 + 0x400 * ch) | (1 << 26);
+		}
+	}
+
    if (ONLY_DIMMA_IS_POPULATED(s->dimms, 0) ||
    		ONLY_DIMMB_IS_POPULATED(s->dimms, 0))
    	MCHBAR8(0x260) = MCHBAR8(0x260) | 1;