[coreboot-gerrit] Change in coreboot[master]: sec/intel/txt: Move DPR size to Kconfig

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46491 )

Change subject: sec/intel/txt: Move DPR size to Kconfig
......................................................................

sec/intel/txt: Move DPR size to Kconfig

Instead of hardcoding the size in code, expose it as a Kconfig symbol.
This allows platform code to program the size in the MCH DPR register.

Change-Id: I9b9bcfc7ceefea6882f8133a6c3755da2e64a80c
Signed-off-by: Angel Pons 
---
M src/security/intel/txt/Kconfig
M src/security/intel/txt/ramstage.c
2 files changed, 10 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/46491/1

diff --git a/src/security/intel/txt/Kconfig b/src/security/intel/txt/Kconfig
index 3dd912e..c69a217 100644
--- a/src/security/intel/txt/Kconfig
+++ b/src/security/intel/txt/Kconfig
@@ -31,6 +31,15 @@
      access to Intel resources. Or for some platforms found inside the
      blob repository.

+config INTEL_TXT_DPR_SIZE
+	int "DMA Protected Region size in MiB"
+	range 0 255
+	default 3
+	help
+	  Specify the size the DPR region needs to have. On at least Haswell,
+	  the MRC does not have an input to specify the size of DPR, so this
+	  field is only used to check if the programmed size is large enough.
+
 config INTEL_TXT_LOGGING
    bool "Enable verbose logging"
    help
diff --git a/src/security/intel/txt/ramstage.c b/src/security/intel/txt/ramstage.c
index f532a2f..8d9f5d9 100644
--- a/src/security/intel/txt/ramstage.c
+++ b/src/security/intel/txt/ramstage.c
@@ -254,7 +254,7 @@
    		return;
    	}

-		if (dpr.size < 3) {
+		if (dpr.size < CONFIG_INTEL_TXT_DPR_SIZE) {
    		printk(BIOS_ERR, "TEE-TXT: MCH DPR configured size is too small.\n");
    		return;
    	}