[coreboot-gerrit] [XS] Change in coreboot[main]: soc/amd/noncar: Make sure preram CBMEM console is aligned

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81448?usp=email )

Change subject: soc/amd/noncar: Make sure preram CBMEM console is aligned
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soc/amd/noncar: Make sure preram CBMEM console is aligned

This fixed build issues when neither FSP, FSPM, nor x86 verstage is
used, in which case the premem CBMEM console buffer would follow an
alignment defined in memlayout_tranfer_buffer.inc. This is unaligned in
the case of AMD Genoa.

Change-Id: I677c09dbdeaf8f6803f55597514c6fe6ec25ab92
Signed-off-by: Arthur Heymans 
---
M src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld
1 file changed, 1 insertion(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/81448/1

diff --git a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld
index 078b084..0a354c0 100644
--- a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld
+++ b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld
@@ -112,6 +112,7 @@
    VERSTAGE(CONFIG_VERSTAGE_ADDR, CONFIG_VERSTAGE_SIZE)
 #endif

+	. = ALIGN(ARCH_CACHELINE_ALIGN_SIZE);
         PRERAM_CBMEM_CONSOLE(., CONFIG_PRERAM_CBMEM_CONSOLE_SIZE)

#if CONFIG_CBFS_CACHE_SIZE > 0