21 Sep
2020
21 Sep
'20
7:04 a.m.
HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/41609 )
Change subject: soc/intel/denverton_ns/bootblock: Fix 32-bit RW PCI_BASE_ADDRESS_0 register ......................................................................
Abandoned
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I2b65b2aee672808932e32438410a4ebe8fa37606
Gerrit-Change-Number: 41609
Gerrit-PatchSet: 2
Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr
Gerrit-Reviewer: David Guckian d.guckian20@gmail.com
Gerrit-Reviewer: David Guckian david.guckian@intel.com
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